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[InstSimplify] restrict icmp fold with 2 sdiv exact operands (PR32949)
These folds were introduced with https://reviews.llvm.org/rL127064 as part of solving: https://bugs.llvm.org/show_bug.cgi?id=9343 As shown here: http://rise4fun.com/Alive/C8 ...however, the sdiv exact case needs a stronger predicate. I opted for duplicated code instead of adding another fallthrough because I think that's easier to read (and edit in case we need/want to restrict/loosen the predicates any more). This should fix: https://bugs.llvm.org/show_bug.cgi?id=32949 https://bugs.llvm.org/show_bug.cgi?id=32948 Differential Revision: https://reviews.llvm.org/D32954 llvm-svn: 303104
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@ -2827,10 +2827,19 @@ static Value *simplifyICmpWithBinOp(CmpInst::Predicate Pred, Value *LHS,
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break;
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case Instruction::UDiv:
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case Instruction::LShr:
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if (ICmpInst::isSigned(Pred))
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if (ICmpInst::isSigned(Pred) || !LBO->isExact() || !RBO->isExact())
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break;
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LLVM_FALLTHROUGH;
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if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
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RBO->getOperand(0), Q, MaxRecurse - 1))
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return V;
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break;
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case Instruction::SDiv:
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if (!ICmpInst::isEquality(Pred) || !LBO->isExact() || !RBO->isExact())
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break;
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if (Value *V = SimplifyICmpInst(Pred, LBO->getOperand(0),
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RBO->getOperand(0), Q, MaxRecurse - 1))
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return V;
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break;
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case Instruction::AShr:
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if (!LBO->isExact() || !RBO->isExact())
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break;
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@ -598,11 +598,14 @@ define i1 @sdiv_exact_equality(i32 %Z) {
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ret i1 %C
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}
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; FIXME: But not other preds: PR32949 - https://bugs.llvm.org/show_bug.cgi?id=32949
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; But not other preds: PR32949 - https://bugs.llvm.org/show_bug.cgi?id=32949
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define i1 @sdiv_exact_not_equality(i32 %Z) {
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; CHECK-LABEL: @sdiv_exact_not_equality(
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; CHECK-NEXT: ret i1 true
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; CHECK-NEXT: [[A:%.*]] = sdiv exact i32 10, %Z
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; CHECK-NEXT: [[B:%.*]] = sdiv exact i32 20, %Z
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; CHECK-NEXT: [[C:%.*]] = icmp ult i32 [[A]], [[B]]
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; CHECK-NEXT: ret i1 [[C]]
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;
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%A = sdiv exact i32 10, %Z
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%B = sdiv exact i32 20, %Z
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