From 6149964938e9cd9fb564d4773155a8a77804e8d3 Mon Sep 17 00:00:00 2001 From: Tom Stellard Date: Wed, 26 Sep 2018 16:53:36 +0000 Subject: [PATCH] AMDGPU/SI: Change predicate to isCIOnly for 32-bit imm s_buffer_load* patterns Summary: This is essentially NFC, because the complex pattern used for these patterns will fail on non-CI, but this makes the pattern consistent with other CI smrd patterns. It is also a performance improvement, because the pattern will now fail earlier on non-CI. Reviewers: arsenm, nhaehnle Reviewed By: arsenm Subscribers: kzhuravl, jvesely, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits Differential Revision: https://reviews.llvm.org/D52469 llvm-svn: 343125 --- lib/Target/AMDGPU/SMInstructions.td | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/lib/Target/AMDGPU/SMInstructions.td b/lib/Target/AMDGPU/SMInstructions.td index bd983cd6f19..6037dcc0e79 100644 --- a/lib/Target/AMDGPU/SMInstructions.td +++ b/lib/Target/AMDGPU/SMInstructions.td @@ -777,7 +777,7 @@ def : SMRD_Pattern_ci <"S_LOAD_DWORDX16", v16i32>; class SMLoad_Pattern_ci : GCNPat < (vt (SIsbuffer_load v4i32:$sbase, (SMRDBufferImm32 i32:$offset), i1:$glc)), (!cast(Instr) $sbase, $offset, (as_i1imm $glc))> { - let OtherPredicates = [isCI]; // should this be isCIOnly? + let OtherPredicates = [isCIOnly]; } def : SMLoad_Pattern_ci <"S_BUFFER_LOAD_DWORD_IMM_ci", i32>;