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https://github.com/RPCS3/llvm-mirror.git
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AVX-512: Added VPTESTM and VPTESTNM instructions for SKX
llvm-svn: 235383
This commit is contained in:
Elena Demikhovsky
parent
1b99f111c2
commit
61a239b83c
@ -287,6 +287,54 @@ multiclass AVX512_maskable_in_asm<bits<8> O, Format F, X86VectorVTInfo _,
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OpcodeStr, AttSrcAsm, IntelSrcAsm, Pattern, [], [], "",
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"$src0 = $dst">;
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// Instruction with mask that puts result in mask register,
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// like "compare" and "vptest"
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multiclass AVX512_maskable_custom_cmp<bits<8> O, Format F,
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dag Outs,
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dag Ins, dag MaskingIns,
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string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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list<dag> Pattern,
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list<dag> MaskingPattern,
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string Round = "",
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InstrItinClass itin = NoItinerary> {
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def NAME: AVX512<O, F, Outs, Ins,
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OpcodeStr#"\t{"#AttSrcAsm#", $dst "#Round#"|"#
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"$dst "#Round#", "#IntelSrcAsm#"}",
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Pattern, itin>;
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def NAME#k: AVX512<O, F, Outs, MaskingIns,
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OpcodeStr#"\t{"#AttSrcAsm#", $dst {${mask}}"#Round#"|"#
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"$dst {${mask}}"#Round#", "#IntelSrcAsm#"}",
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MaskingPattern, itin>, EVEX_K;
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}
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multiclass AVX512_maskable_common_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs,
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dag Ins, dag MaskingIns,
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string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, dag MaskingRHS,
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string Round = "",
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InstrItinClass itin = NoItinerary> :
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AVX512_maskable_custom_cmp<O, F, Outs, Ins, MaskingIns, OpcodeStr,
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AttSrcAsm, IntelSrcAsm,
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[(set _.KRC:$dst, RHS)],
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[(set _.KRC:$dst, MaskingRHS)],
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Round, NoItinerary>;
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multiclass AVX512_maskable_cmp<bits<8> O, Format F, X86VectorVTInfo _,
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dag Outs, dag Ins, string OpcodeStr,
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string AttSrcAsm, string IntelSrcAsm,
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dag RHS, string Round = "",
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InstrItinClass itin = NoItinerary> :
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AVX512_maskable_common_cmp<O, F, _, Outs, Ins,
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!con((ins _.KRCWM:$mask), Ins),
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OpcodeStr, AttSrcAsm, IntelSrcAsm, RHS,
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(and _.KRCWM:$mask, RHS),
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Round, itin>;
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// Bitcasts between 512-bit vector types. Return the original type since
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// no instruction is needed for the conversion
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let Predicates = [HasAVX512] in {
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@ -3383,36 +3431,83 @@ def : Pat<(v8f64 (int_x86_avx512_mask_min_pd_512 (v8f64 VR512:$src1),
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// AVX-512 VPTESTM instructions
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//===----------------------------------------------------------------------===//
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multiclass avx512_vptest<bits<8> opc, string OpcodeStr, RegisterClass KRC,
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RegisterClass RC, X86MemOperand x86memop, PatFrag memop_frag,
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SDNode OpNode, ValueType vt> {
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def rr : AVX512PI<opc, MRMSrcReg,
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(outs KRC:$dst), (ins RC:$src1, RC:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set KRC:$dst, (OpNode (vt RC:$src1), (vt RC:$src2)))],
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SSEPackedInt>, EVEX_4V;
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def rm : AVX512PI<opc, MRMSrcMem,
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(outs KRC:$dst), (ins RC:$src1, x86memop:$src2),
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!strconcat(OpcodeStr, "\t{$src2, $src1, $dst|$dst, $src1, $src2}"),
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[(set KRC:$dst, (OpNode (vt RC:$src1),
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(bitconvert (memop_frag addr:$src2))))], SSEPackedInt>, EVEX_4V;
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multiclass avx512_vptest<bits<8> opc, string OpcodeStr, SDNode OpNode,
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X86VectorVTInfo _> {
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defm rr : AVX512_maskable_cmp<opc, MRMSrcReg, _, (outs _.KRC:$dst),
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(ins _.RC:$src1, _.RC:$src2), OpcodeStr,
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"$src2, $src1", "$src1, $src2",
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(OpNode (_.VT _.RC:$src1), (_.VT _.RC:$src2))>,
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EVEX_4V;
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let mayLoad = 1 in
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defm rm : AVX512_maskable_cmp<opc, MRMSrcMem, _, (outs _.KRC:$dst),
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(ins _.RC:$src1, _.MemOp:$src2), OpcodeStr,
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"$src2, $src1", "$src1, $src2",
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(OpNode (_.VT _.RC:$src1),
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(_.VT (bitconvert (_.LdFrag addr:$src2))))>,
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EVEX_4V,
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EVEX_CD8<_.EltSize, CD8VF>;
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}
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defm VPTESTMDZ : avx512_vptest<0x27, "vptestmd", VK16, VR512, f512mem,
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loadv16i32, X86testm, v16i32>, T8PD, EVEX_V512,
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EVEX_CD8<32, CD8VF>;
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defm VPTESTMQZ : avx512_vptest<0x27, "vptestmq", VK8, VR512, f512mem,
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loadv8i64, X86testm, v8i64>, T8PD, EVEX_V512, VEX_W,
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EVEX_CD8<64, CD8VF>;
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let Predicates = [HasCDI] in {
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defm VPTESTNMDZ : avx512_vptest<0x27, "vptestnmd", VK16, VR512, f512mem,
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loadv16i32, X86testnm, v16i32>, T8XS, EVEX_V512,
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EVEX_CD8<32, CD8VF>;
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defm VPTESTNMQZ : avx512_vptest<0x27, "vptestnmq", VK8, VR512, f512mem,
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loadv8i64, X86testnm, v8i64>, T8XS, EVEX_V512, VEX_W,
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EVEX_CD8<64, CD8VF>;
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multiclass avx512_vptest_mb<bits<8> opc, string OpcodeStr, SDNode OpNode,
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X86VectorVTInfo _> {
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let mayLoad = 1 in
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defm rmb : AVX512_maskable_cmp<opc, MRMSrcMem, _, (outs _.KRC:$dst),
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(ins _.RC:$src1, _.ScalarMemOp:$src2), OpcodeStr,
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"${src2}"##_.BroadcastStr##", $src1",
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"$src1, ${src2}"##_.BroadcastStr,
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(OpNode (_.VT _.RC:$src1), (_.VT (X86VBroadcast
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(_.ScalarLdFrag addr:$src2))))>,
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EVEX_B, EVEX_4V, EVEX_CD8<_.EltSize, CD8VF>;
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}
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multiclass avx512_vptest_dq_sizes<bits<8> opc, string OpcodeStr, SDNode OpNode,
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AVX512VLVectorVTInfo _> {
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let Predicates = [HasAVX512] in
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defm Z : avx512_vptest<opc, OpcodeStr, OpNode, _.info512>,
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avx512_vptest_mb<opc, OpcodeStr, OpNode, _.info512>, EVEX_V512;
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let Predicates = [HasAVX512, HasVLX] in {
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defm Z256 : avx512_vptest<opc, OpcodeStr, OpNode, _.info256>,
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avx512_vptest_mb<opc, OpcodeStr, OpNode, _.info256>, EVEX_V256;
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defm Z128 : avx512_vptest<opc, OpcodeStr, OpNode, _.info128>,
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avx512_vptest_mb<opc, OpcodeStr, OpNode, _.info128>, EVEX_V128;
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}
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}
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multiclass avx512_vptest_dq<bits<8> opc, string OpcodeStr, SDNode OpNode> {
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defm D : avx512_vptest_dq_sizes<opc, OpcodeStr#"d", OpNode,
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avx512vl_i32_info>;
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defm Q : avx512_vptest_dq_sizes<opc, OpcodeStr#"q", OpNode,
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avx512vl_i64_info>, VEX_W;
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}
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multiclass avx512_vptest_wb<bits<8> opc, string OpcodeStr,
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SDNode OpNode> {
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let Predicates = [HasBWI] in {
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defm WZ: avx512_vptest<opc, OpcodeStr#"w", OpNode, v32i16_info>,
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EVEX_V512, VEX_W;
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defm BZ: avx512_vptest<opc, OpcodeStr#"b", OpNode, v64i8_info>,
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EVEX_V512;
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}
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let Predicates = [HasVLX, HasBWI] in {
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defm WZ256: avx512_vptest<opc, OpcodeStr#"w", OpNode, v16i16x_info>,
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EVEX_V256, VEX_W;
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defm WZ128: avx512_vptest<opc, OpcodeStr#"w", OpNode, v8i16x_info>,
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EVEX_V128, VEX_W;
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defm BZ256: avx512_vptest<opc, OpcodeStr#"b", OpNode, v32i8x_info>,
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EVEX_V256;
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defm BZ128: avx512_vptest<opc, OpcodeStr#"b", OpNode, v16i8x_info>,
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EVEX_V128;
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}
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}
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multiclass avx512_vptest_all_forms<bits<8> opc_wb, bits<8> opc_dq, string OpcodeStr,
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SDNode OpNode> :
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avx512_vptest_wb <opc_wb, OpcodeStr, OpNode>,
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avx512_vptest_dq<opc_dq, OpcodeStr, OpNode>;
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defm VPTESTM : avx512_vptest_all_forms<0x26, 0x27, "vptestm", X86testm>, T8PD;
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defm VPTESTNM : avx512_vptest_all_forms<0x26, 0x27, "vptestnm", X86testnm>, T8XS;
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def : Pat <(i16 (int_x86_avx512_mask_ptestm_d_512 (v16i32 VR512:$src1),
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(v16i32 VR512:$src2), (i16 -1))),
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@ -178,11 +178,13 @@ def X86ptest : SDNode<"X86ISD::PTEST", SDTX86CmpPTest>;
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def X86testp : SDNode<"X86ISD::TESTP", SDTX86CmpPTest>;
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def X86kortest : SDNode<"X86ISD::KORTEST", SDTX86CmpPTest>;
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def X86testm : SDNode<"X86ISD::TESTM", SDTypeProfile<1, 2, [SDTCisVec<0>,
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SDTCisVec<1>,
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SDTCisSameAs<2, 1>]>>;
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SDTCisVec<1>, SDTCisSameAs<2, 1>,
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SDTCVecEltisVT<0, i1>,
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SDTCisSameNumEltsAs<0, 1>]>>;
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def X86testnm : SDNode<"X86ISD::TESTNM", SDTypeProfile<1, 2, [SDTCisVec<0>,
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SDTCisVec<1>,
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SDTCisSameAs<2, 1>]>>;
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SDTCisVec<1>, SDTCisSameAs<2, 1>,
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SDTCVecEltisVT<0, i1>,
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SDTCisSameNumEltsAs<0, 1>]>>;
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def X86select : SDNode<"X86ISD::SELECT" , SDTSelect>;
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def X86pmuludq : SDNode<"X86ISD::PMULUDQ",
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@ -71,3 +71,195 @@
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// CHECK: vpblendmw -8256(%rdx), %zmm20, %zmm26
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// CHECK: encoding: [0x62,0x62,0xdd,0x40,0x66,0x92,0xc0,0xdf,0xff,0xff]
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vpblendmw -8256(%rdx), %zmm20, %zmm26
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// CHECK: vptestmb %zmm19, %zmm17, %k5
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// CHECK: encoding: [0x62,0xb2,0x75,0x40,0x26,0xeb]
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vptestmb %zmm19, %zmm17, %k5
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// CHECK: vptestmb %zmm19, %zmm17, %k5 {%k3}
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// CHECK: encoding: [0x62,0xb2,0x75,0x43,0x26,0xeb]
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vptestmb %zmm19, %zmm17, %k5 {%k3}
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// CHECK: vptestmb (%rcx), %zmm17, %k5
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// CHECK: encoding: [0x62,0xf2,0x75,0x40,0x26,0x29]
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vptestmb (%rcx), %zmm17, %k5
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// CHECK: vptestmb 291(%rax,%r14,8), %zmm17, %k5
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// CHECK: encoding: [0x62,0xb2,0x75,0x40,0x26,0xac,0xf0,0x23,0x01,0x00,0x00]
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vptestmb 291(%rax,%r14,8), %zmm17, %k5
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// CHECK: vptestmb 8128(%rdx), %zmm17, %k5
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// CHECK: encoding: [0x62,0xf2,0x75,0x40,0x26,0x6a,0x7f]
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vptestmb 8128(%rdx), %zmm17, %k5
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// CHECK: vptestmb 8192(%rdx), %zmm17, %k5
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// CHECK: encoding: [0x62,0xf2,0x75,0x40,0x26,0xaa,0x00,0x20,0x00,0x00]
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vptestmb 8192(%rdx), %zmm17, %k5
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// CHECK: vptestmb -8192(%rdx), %zmm17, %k5
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// CHECK: encoding: [0x62,0xf2,0x75,0x40,0x26,0x6a,0x80]
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vptestmb -8192(%rdx), %zmm17, %k5
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// CHECK: vptestmb -8256(%rdx), %zmm17, %k5
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// CHECK: encoding: [0x62,0xf2,0x75,0x40,0x26,0xaa,0xc0,0xdf,0xff,0xff]
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vptestmb -8256(%rdx), %zmm17, %k5
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// CHECK: vptestmw %zmm19, %zmm29, %k4
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// CHECK: encoding: [0x62,0xb2,0x95,0x40,0x26,0xe3]
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vptestmw %zmm19, %zmm29, %k4
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// CHECK: vptestmw %zmm19, %zmm29, %k4 {%k2}
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// CHECK: encoding: [0x62,0xb2,0x95,0x42,0x26,0xe3]
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vptestmw %zmm19, %zmm29, %k4 {%k2}
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// CHECK: vptestmw (%rcx), %zmm29, %k4
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// CHECK: encoding: [0x62,0xf2,0x95,0x40,0x26,0x21]
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vptestmw (%rcx), %zmm29, %k4
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// CHECK: vptestmw 291(%rax,%r14,8), %zmm29, %k4
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// CHECK: encoding: [0x62,0xb2,0x95,0x40,0x26,0xa4,0xf0,0x23,0x01,0x00,0x00]
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vptestmw 291(%rax,%r14,8), %zmm29, %k4
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// CHECK: vptestmw 8128(%rdx), %zmm29, %k4
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// CHECK: encoding: [0x62,0xf2,0x95,0x40,0x26,0x62,0x7f]
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vptestmw 8128(%rdx), %zmm29, %k4
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// CHECK: vptestmw 8192(%rdx), %zmm29, %k4
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// CHECK: encoding: [0x62,0xf2,0x95,0x40,0x26,0xa2,0x00,0x20,0x00,0x00]
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vptestmw 8192(%rdx), %zmm29, %k4
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// CHECK: vptestmw -8192(%rdx), %zmm29, %k4
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// CHECK: encoding: [0x62,0xf2,0x95,0x40,0x26,0x62,0x80]
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vptestmw -8192(%rdx), %zmm29, %k4
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// CHECK: vptestmw -8256(%rdx), %zmm29, %k4
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// CHECK: encoding: [0x62,0xf2,0x95,0x40,0x26,0xa2,0xc0,0xdf,0xff,0xff]
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vptestmw -8256(%rdx), %zmm29, %k4
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// CHECK: vptestnmb %zmm23, %zmm24, %k2
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// CHECK: encoding: [0x62,0xb2,0x3e,0x40,0x26,0xd7]
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vptestnmb %zmm23, %zmm24, %k2
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// CHECK: vptestnmb %zmm23, %zmm24, %k2 {%k7}
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// CHECK: encoding: [0x62,0xb2,0x3e,0x47,0x26,0xd7]
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vptestnmb %zmm23, %zmm24, %k2 {%k7}
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// CHECK: vptestnmb (%rcx), %zmm24, %k2
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// CHECK: encoding: [0x62,0xf2,0x3e,0x40,0x26,0x11]
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vptestnmb (%rcx), %zmm24, %k2
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// CHECK: vptestnmb 291(%rax,%r14,8), %zmm24, %k2
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// CHECK: encoding: [0x62,0xb2,0x3e,0x40,0x26,0x94,0xf0,0x23,0x01,0x00,0x00]
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vptestnmb 291(%rax,%r14,8), %zmm24, %k2
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// CHECK: vptestnmb 8128(%rdx), %zmm24, %k2
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// CHECK: encoding: [0x62,0xf2,0x3e,0x40,0x26,0x52,0x7f]
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vptestnmb 8128(%rdx), %zmm24, %k2
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// CHECK: vptestnmb 8192(%rdx), %zmm24, %k2
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// CHECK: encoding: [0x62,0xf2,0x3e,0x40,0x26,0x92,0x00,0x20,0x00,0x00]
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vptestnmb 8192(%rdx), %zmm24, %k2
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// CHECK: vptestnmb -8192(%rdx), %zmm24, %k2
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// CHECK: encoding: [0x62,0xf2,0x3e,0x40,0x26,0x52,0x80]
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vptestnmb -8192(%rdx), %zmm24, %k2
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// CHECK: vptestnmb -8256(%rdx), %zmm24, %k2
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// CHECK: encoding: [0x62,0xf2,0x3e,0x40,0x26,0x92,0xc0,0xdf,0xff,0xff]
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vptestnmb -8256(%rdx), %zmm24, %k2
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// CHECK: vptestnmw %zmm27, %zmm18, %k4
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// CHECK: encoding: [0x62,0x92,0xee,0x40,0x26,0xe3]
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vptestnmw %zmm27, %zmm18, %k4
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// CHECK: vptestnmw %zmm27, %zmm18, %k4 {%k5}
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// CHECK: encoding: [0x62,0x92,0xee,0x45,0x26,0xe3]
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vptestnmw %zmm27, %zmm18, %k4 {%k5}
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// CHECK: vptestnmw (%rcx), %zmm18, %k4
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// CHECK: encoding: [0x62,0xf2,0xee,0x40,0x26,0x21]
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vptestnmw (%rcx), %zmm18, %k4
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// CHECK: vptestnmw 291(%rax,%r14,8), %zmm18, %k4
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// CHECK: encoding: [0x62,0xb2,0xee,0x40,0x26,0xa4,0xf0,0x23,0x01,0x00,0x00]
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vptestnmw 291(%rax,%r14,8), %zmm18, %k4
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// CHECK: vptestnmw 8128(%rdx), %zmm18, %k4
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// CHECK: encoding: [0x62,0xf2,0xee,0x40,0x26,0x62,0x7f]
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vptestnmw 8128(%rdx), %zmm18, %k4
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// CHECK: vptestnmw 8192(%rdx), %zmm18, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xee,0x40,0x26,0xa2,0x00,0x20,0x00,0x00]
|
||||
vptestnmw 8192(%rdx), %zmm18, %k4
|
||||
|
||||
// CHECK: vptestnmw -8192(%rdx), %zmm18, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xee,0x40,0x26,0x62,0x80]
|
||||
vptestnmw -8192(%rdx), %zmm18, %k4
|
||||
|
||||
// CHECK: vptestnmw -8256(%rdx), %zmm18, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xee,0x40,0x26,0xa2,0xc0,0xdf,0xff,0xff]
|
||||
vptestnmw -8256(%rdx), %zmm18, %k4
|
||||
|
||||
// CHECK: vptestnmb %zmm19, %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x26,0x40,0x26,0xdb]
|
||||
vptestnmb %zmm19, %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb %zmm19, %zmm27, %k3 {%k2}
|
||||
// CHECK: encoding: [0x62,0xb2,0x26,0x42,0x26,0xdb]
|
||||
vptestnmb %zmm19, %zmm27, %k3 {%k2}
|
||||
|
||||
// CHECK: vptestnmb (%rcx), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x26,0x40,0x26,0x19]
|
||||
vptestnmb (%rcx), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb 4660(%rax,%r14,8), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x26,0x40,0x26,0x9c,0xf0,0x34,0x12,0x00,0x00]
|
||||
vptestnmb 4660(%rax,%r14,8), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb 8128(%rdx), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x26,0x40,0x26,0x5a,0x7f]
|
||||
vptestnmb 8128(%rdx), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb 8192(%rdx), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x26,0x40,0x26,0x9a,0x00,0x20,0x00,0x00]
|
||||
vptestnmb 8192(%rdx), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb -8192(%rdx), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x26,0x40,0x26,0x5a,0x80]
|
||||
vptestnmb -8192(%rdx), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmb -8256(%rdx), %zmm27, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x26,0x40,0x26,0x9a,0xc0,0xdf,0xff,0xff]
|
||||
vptestnmb -8256(%rdx), %zmm27, %k3
|
||||
|
||||
// CHECK: vptestnmw %zmm21, %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xb2,0xf6,0x40,0x26,0xd5]
|
||||
vptestnmw %zmm21, %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw %zmm21, %zmm17, %k2 {%k4}
|
||||
// CHECK: encoding: [0x62,0xb2,0xf6,0x44,0x26,0xd5]
|
||||
vptestnmw %zmm21, %zmm17, %k2 {%k4}
|
||||
|
||||
// CHECK: vptestnmw (%rcx), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0xf6,0x40,0x26,0x11]
|
||||
vptestnmw (%rcx), %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw 4660(%rax,%r14,8), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xb2,0xf6,0x40,0x26,0x94,0xf0,0x34,0x12,0x00,0x00]
|
||||
vptestnmw 4660(%rax,%r14,8), %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw 8128(%rdx), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0xf6,0x40,0x26,0x52,0x7f]
|
||||
vptestnmw 8128(%rdx), %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw 8192(%rdx), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0xf6,0x40,0x26,0x92,0x00,0x20,0x00,0x00]
|
||||
vptestnmw 8192(%rdx), %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw -8192(%rdx), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0xf6,0x40,0x26,0x52,0x80]
|
||||
vptestnmw -8192(%rdx), %zmm17, %k2
|
||||
|
||||
// CHECK: vptestnmw -8256(%rdx), %zmm17, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0xf6,0x40,0x26,0x92,0xc0,0xdf,0xff,0xff]
|
||||
vptestnmw -8256(%rdx), %zmm17, %k2
|
||||
|
||||
@ -447,3 +447,415 @@
|
||||
// CHECK: vpblendmq -1032(%rdx){1to4}, %ymm23, %ymm21
|
||||
// CHECK: encoding: [0x62,0xe2,0xc5,0x30,0x64,0xaa,0xf8,0xfb,0xff,0xff]
|
||||
vpblendmq -1032(%rdx){1to4}, %ymm23, %ymm21
|
||||
|
||||
// CHECK: vptestmd %xmm20, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x00,0x27,0xd4]
|
||||
vptestmd %xmm20, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd %xmm20, %xmm20, %k2 {%k7}
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x07,0x27,0xd4]
|
||||
vptestmd %xmm20, %xmm20, %k2 {%k7}
|
||||
|
||||
// CHECK: vptestmd (%rcx), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x00,0x27,0x11]
|
||||
vptestmd (%rcx), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd 291(%rax,%r14,8), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x00,0x27,0x94,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestmd 291(%rax,%r14,8), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd (%rcx){1to4}, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x10,0x27,0x11]
|
||||
vptestmd (%rcx){1to4}, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd 2032(%rdx), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x00,0x27,0x52,0x7f]
|
||||
vptestmd 2032(%rdx), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd 2048(%rdx), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x00,0x27,0x92,0x00,0x08,0x00,0x00]
|
||||
vptestmd 2048(%rdx), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd -2048(%rdx), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x00,0x27,0x52,0x80]
|
||||
vptestmd -2048(%rdx), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd -2064(%rdx), %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x00,0x27,0x92,0xf0,0xf7,0xff,0xff]
|
||||
vptestmd -2064(%rdx), %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd 508(%rdx){1to4}, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x10,0x27,0x52,0x7f]
|
||||
vptestmd 508(%rdx){1to4}, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd 512(%rdx){1to4}, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x10,0x27,0x92,0x00,0x02,0x00,0x00]
|
||||
vptestmd 512(%rdx){1to4}, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd -512(%rdx){1to4}, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x10,0x27,0x52,0x80]
|
||||
vptestmd -512(%rdx){1to4}, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd -516(%rdx){1to4}, %xmm20, %k2
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x10,0x27,0x92,0xfc,0xfd,0xff,0xff]
|
||||
vptestmd -516(%rdx){1to4}, %xmm20, %k2
|
||||
|
||||
// CHECK: vptestmd %ymm17, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x20,0x27,0xd9]
|
||||
vptestmd %ymm17, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd %ymm17, %ymm20, %k3 {%k5}
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x25,0x27,0xd9]
|
||||
vptestmd %ymm17, %ymm20, %k3 {%k5}
|
||||
|
||||
// CHECK: vptestmd (%rcx), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x20,0x27,0x19]
|
||||
vptestmd (%rcx), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd 291(%rax,%r14,8), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x5d,0x20,0x27,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestmd 291(%rax,%r14,8), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd (%rcx){1to8}, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x30,0x27,0x19]
|
||||
vptestmd (%rcx){1to8}, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd 4064(%rdx), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x20,0x27,0x5a,0x7f]
|
||||
vptestmd 4064(%rdx), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd 4096(%rdx), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x20,0x27,0x9a,0x00,0x10,0x00,0x00]
|
||||
vptestmd 4096(%rdx), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd -4096(%rdx), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x20,0x27,0x5a,0x80]
|
||||
vptestmd -4096(%rdx), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd -4128(%rdx), %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x20,0x27,0x9a,0xe0,0xef,0xff,0xff]
|
||||
vptestmd -4128(%rdx), %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd 508(%rdx){1to8}, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x30,0x27,0x5a,0x7f]
|
||||
vptestmd 508(%rdx){1to8}, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd 512(%rdx){1to8}, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x30,0x27,0x9a,0x00,0x02,0x00,0x00]
|
||||
vptestmd 512(%rdx){1to8}, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd -512(%rdx){1to8}, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x30,0x27,0x5a,0x80]
|
||||
vptestmd -512(%rdx){1to8}, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmd -516(%rdx){1to8}, %ymm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5d,0x30,0x27,0x9a,0xfc,0xfd,0xff,0xff]
|
||||
vptestmd -516(%rdx){1to8}, %ymm20, %k3
|
||||
|
||||
// CHECK: vptestmq %xmm28, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0x92,0xcd,0x00,0x27,0xe4]
|
||||
vptestmq %xmm28, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq %xmm28, %xmm22, %k4 {%k3}
|
||||
// CHECK: encoding: [0x62,0x92,0xcd,0x03,0x27,0xe4]
|
||||
vptestmq %xmm28, %xmm22, %k4 {%k3}
|
||||
|
||||
// CHECK: vptestmq (%rcx), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x00,0x27,0x21]
|
||||
vptestmq (%rcx), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq 291(%rax,%r14,8), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xb2,0xcd,0x00,0x27,0xa4,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestmq 291(%rax,%r14,8), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq (%rcx){1to2}, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x10,0x27,0x21]
|
||||
vptestmq (%rcx){1to2}, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq 2032(%rdx), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x00,0x27,0x62,0x7f]
|
||||
vptestmq 2032(%rdx), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq 2048(%rdx), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x00,0x27,0xa2,0x00,0x08,0x00,0x00]
|
||||
vptestmq 2048(%rdx), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq -2048(%rdx), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x00,0x27,0x62,0x80]
|
||||
vptestmq -2048(%rdx), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq -2064(%rdx), %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x00,0x27,0xa2,0xf0,0xf7,0xff,0xff]
|
||||
vptestmq -2064(%rdx), %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq 1016(%rdx){1to2}, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x10,0x27,0x62,0x7f]
|
||||
vptestmq 1016(%rdx){1to2}, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq 1024(%rdx){1to2}, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x10,0x27,0xa2,0x00,0x04,0x00,0x00]
|
||||
vptestmq 1024(%rdx){1to2}, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq -1024(%rdx){1to2}, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x10,0x27,0x62,0x80]
|
||||
vptestmq -1024(%rdx){1to2}, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq -1032(%rdx){1to2}, %xmm22, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xcd,0x10,0x27,0xa2,0xf8,0xfb,0xff,0xff]
|
||||
vptestmq -1032(%rdx){1to2}, %xmm22, %k4
|
||||
|
||||
// CHECK: vptestmq %ymm20, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0xd5,0x20,0x27,0xdc]
|
||||
vptestmq %ymm20, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq %ymm20, %ymm21, %k3 {%k7}
|
||||
// CHECK: encoding: [0x62,0xb2,0xd5,0x27,0x27,0xdc]
|
||||
vptestmq %ymm20, %ymm21, %k3 {%k7}
|
||||
|
||||
// CHECK: vptestmq (%rcx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x20,0x27,0x19]
|
||||
vptestmq (%rcx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq 291(%rax,%r14,8), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0xd5,0x20,0x27,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestmq 291(%rax,%r14,8), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq (%rcx){1to4}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x30,0x27,0x19]
|
||||
vptestmq (%rcx){1to4}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq 4064(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x20,0x27,0x5a,0x7f]
|
||||
vptestmq 4064(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq 4096(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x20,0x27,0x9a,0x00,0x10,0x00,0x00]
|
||||
vptestmq 4096(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq -4096(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x20,0x27,0x5a,0x80]
|
||||
vptestmq -4096(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq -4128(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x20,0x27,0x9a,0xe0,0xef,0xff,0xff]
|
||||
vptestmq -4128(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq 1016(%rdx){1to4}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x30,0x27,0x5a,0x7f]
|
||||
vptestmq 1016(%rdx){1to4}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq 1024(%rdx){1to4}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x30,0x27,0x9a,0x00,0x04,0x00,0x00]
|
||||
vptestmq 1024(%rdx){1to4}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestmq -1024(%rdx){1to4}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0xd5,0x30,0x27,0x5a,0x80]
|
||||
vptestmq -1024(%rdx){1to4}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd %xmm22, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x5e,0x00,0x27,0xde]
|
||||
vptestnmd %xmm22, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd %xmm22, %xmm20, %k3 {%k7}
|
||||
// CHECK: encoding: [0x62,0xb2,0x5e,0x07,0x27,0xde]
|
||||
vptestnmd %xmm22, %xmm20, %k3 {%k7}
|
||||
|
||||
// CHECK: vptestnmd (%rcx), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x00,0x27,0x19]
|
||||
vptestnmd (%rcx), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd 291(%rax,%r14,8), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x5e,0x00,0x27,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestnmd 291(%rax,%r14,8), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd (%rcx){1to4}, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x10,0x27,0x19]
|
||||
vptestnmd (%rcx){1to4}, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd 2032(%rdx), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x00,0x27,0x5a,0x7f]
|
||||
vptestnmd 2032(%rdx), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd 2048(%rdx), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x00,0x27,0x9a,0x00,0x08,0x00,0x00]
|
||||
vptestnmd 2048(%rdx), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd -2048(%rdx), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x00,0x27,0x5a,0x80]
|
||||
vptestnmd -2048(%rdx), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd -2064(%rdx), %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x00,0x27,0x9a,0xf0,0xf7,0xff,0xff]
|
||||
vptestnmd -2064(%rdx), %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd 508(%rdx){1to4}, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x10,0x27,0x5a,0x7f]
|
||||
vptestnmd 508(%rdx){1to4}, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd 512(%rdx){1to4}, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x10,0x27,0x9a,0x00,0x02,0x00,0x00]
|
||||
vptestnmd 512(%rdx){1to4}, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd -512(%rdx){1to4}, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x10,0x27,0x5a,0x80]
|
||||
vptestnmd -512(%rdx){1to4}, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd -516(%rdx){1to4}, %xmm20, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x5e,0x10,0x27,0x9a,0xfc,0xfd,0xff,0xff]
|
||||
vptestnmd -516(%rdx){1to4}, %xmm20, %k3
|
||||
|
||||
// CHECK: vptestnmd %ymm23, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x56,0x20,0x27,0xdf]
|
||||
vptestnmd %ymm23, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd %ymm23, %ymm21, %k3 {%k7}
|
||||
// CHECK: encoding: [0x62,0xb2,0x56,0x27,0x27,0xdf]
|
||||
vptestnmd %ymm23, %ymm21, %k3 {%k7}
|
||||
|
||||
// CHECK: vptestnmd (%rcx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x20,0x27,0x19]
|
||||
vptestnmd (%rcx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd 291(%rax,%r14,8), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xb2,0x56,0x20,0x27,0x9c,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestnmd 291(%rax,%r14,8), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd (%rcx){1to8}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x30,0x27,0x19]
|
||||
vptestnmd (%rcx){1to8}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd 4064(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x20,0x27,0x5a,0x7f]
|
||||
vptestnmd 4064(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd 4096(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x20,0x27,0x9a,0x00,0x10,0x00,0x00]
|
||||
vptestnmd 4096(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd -4096(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x20,0x27,0x5a,0x80]
|
||||
vptestnmd -4096(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd -4128(%rdx), %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x20,0x27,0x9a,0xe0,0xef,0xff,0xff]
|
||||
vptestnmd -4128(%rdx), %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd 508(%rdx){1to8}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x30,0x27,0x5a,0x7f]
|
||||
vptestnmd 508(%rdx){1to8}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd 512(%rdx){1to8}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x30,0x27,0x9a,0x00,0x02,0x00,0x00]
|
||||
vptestnmd 512(%rdx){1to8}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd -512(%rdx){1to8}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x30,0x27,0x5a,0x80]
|
||||
vptestnmd -512(%rdx){1to8}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmd -516(%rdx){1to8}, %ymm21, %k3
|
||||
// CHECK: encoding: [0x62,0xf2,0x56,0x30,0x27,0x9a,0xfc,0xfd,0xff,0xff]
|
||||
vptestnmd -516(%rdx){1to8}, %ymm21, %k3
|
||||
|
||||
// CHECK: vptestnmq %xmm21, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xb2,0xde,0x00,0x27,0xed]
|
||||
vptestnmq %xmm21, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq %xmm21, %xmm20, %k5 {%k5}
|
||||
// CHECK: encoding: [0x62,0xb2,0xde,0x05,0x27,0xed]
|
||||
vptestnmq %xmm21, %xmm20, %k5 {%k5}
|
||||
|
||||
// CHECK: vptestnmq (%rcx), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x00,0x27,0x29]
|
||||
vptestnmq (%rcx), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq 291(%rax,%r14,8), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xb2,0xde,0x00,0x27,0xac,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestnmq 291(%rax,%r14,8), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq (%rcx){1to2}, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x10,0x27,0x29]
|
||||
vptestnmq (%rcx){1to2}, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq 2032(%rdx), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x00,0x27,0x6a,0x7f]
|
||||
vptestnmq 2032(%rdx), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq 2048(%rdx), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x00,0x27,0xaa,0x00,0x08,0x00,0x00]
|
||||
vptestnmq 2048(%rdx), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq -2048(%rdx), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x00,0x27,0x6a,0x80]
|
||||
vptestnmq -2048(%rdx), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq -2064(%rdx), %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x00,0x27,0xaa,0xf0,0xf7,0xff,0xff]
|
||||
vptestnmq -2064(%rdx), %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq 1016(%rdx){1to2}, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x10,0x27,0x6a,0x7f]
|
||||
vptestnmq 1016(%rdx){1to2}, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq 1024(%rdx){1to2}, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x10,0x27,0xaa,0x00,0x04,0x00,0x00]
|
||||
vptestnmq 1024(%rdx){1to2}, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq -1024(%rdx){1to2}, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x10,0x27,0x6a,0x80]
|
||||
vptestnmq -1024(%rdx){1to2}, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq -1032(%rdx){1to2}, %xmm20, %k5
|
||||
// CHECK: encoding: [0x62,0xf2,0xde,0x10,0x27,0xaa,0xf8,0xfb,0xff,0xff]
|
||||
vptestnmq -1032(%rdx){1to2}, %xmm20, %k5
|
||||
|
||||
// CHECK: vptestnmq %ymm21, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xb2,0xbe,0x20,0x27,0xe5]
|
||||
vptestnmq %ymm21, %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq %ymm21, %ymm24, %k4 {%k3}
|
||||
// CHECK: encoding: [0x62,0xb2,0xbe,0x23,0x27,0xe5]
|
||||
vptestnmq %ymm21, %ymm24, %k4 {%k3}
|
||||
|
||||
// CHECK: vptestnmq (%rcx), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x20,0x27,0x21]
|
||||
vptestnmq (%rcx), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq 291(%rax,%r14,8), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xb2,0xbe,0x20,0x27,0xa4,0xf0,0x23,0x01,0x00,0x00]
|
||||
vptestnmq 291(%rax,%r14,8), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq (%rcx){1to4}, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x30,0x27,0x21]
|
||||
vptestnmq (%rcx){1to4}, %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq 4064(%rdx), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x20,0x27,0x62,0x7f]
|
||||
vptestnmq 4064(%rdx), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq 4096(%rdx), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x20,0x27,0xa2,0x00,0x10,0x00,0x00]
|
||||
vptestnmq 4096(%rdx), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq -4096(%rdx), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x20,0x27,0x62,0x80]
|
||||
vptestnmq -4096(%rdx), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq -4128(%rdx), %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x20,0x27,0xa2,0xe0,0xef,0xff,0xff]
|
||||
vptestnmq -4128(%rdx), %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq 1016(%rdx){1to4}, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x30,0x27,0x62,0x7f]
|
||||
vptestnmq 1016(%rdx){1to4}, %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq 1024(%rdx){1to4}, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x30,0x27,0xa2,0x00,0x04,0x00,0x00]
|
||||
vptestnmq 1024(%rdx){1to4}, %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq -1024(%rdx){1to4}, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x30,0x27,0x62,0x80]
|
||||
vptestnmq -1024(%rdx){1to4}, %ymm24, %k4
|
||||
|
||||
// CHECK: vptestnmq -1032(%rdx){1to4}, %ymm24, %k4
|
||||
// CHECK: encoding: [0x62,0xf2,0xbe,0x30,0x27,0xa2,0xf8,0xfb,0xff,0xff]
|
||||
vptestnmq -1032(%rdx){1to4}, %ymm24, %k4
|
||||
|
||||
@ -270,12 +270,16 @@ static inline bool inheritsFrom(InstructionContext child,
|
||||
return false;
|
||||
case IC_EVEX_L_KZ:
|
||||
case IC_EVEX_L_XS_KZ:
|
||||
case IC_EVEX_L_XS_B:
|
||||
case IC_EVEX_L_XS_K_B:
|
||||
case IC_EVEX_L_XD_KZ:
|
||||
case IC_EVEX_L_OPSIZE_KZ:
|
||||
case IC_EVEX_L_OPSIZE_KZ_B:
|
||||
return false;
|
||||
case IC_EVEX_L_W_K:
|
||||
case IC_EVEX_L_W_XS_K:
|
||||
case IC_EVEX_L_W_XS_B:
|
||||
case IC_EVEX_L_W_XS_K_B:
|
||||
case IC_EVEX_L_W_XD_K:
|
||||
case IC_EVEX_L_W_OPSIZE_K:
|
||||
case IC_EVEX_L_W_OPSIZE_B:
|
||||
@ -291,6 +295,7 @@ static inline bool inheritsFrom(InstructionContext child,
|
||||
case IC_EVEX_L2_K_B:
|
||||
case IC_EVEX_L2_KZ_B:
|
||||
case IC_EVEX_L2_XS_K:
|
||||
case IC_EVEX_L2_XS_K_B:
|
||||
case IC_EVEX_L2_XS_B:
|
||||
case IC_EVEX_L2_XD_B:
|
||||
case IC_EVEX_L2_XD_K:
|
||||
@ -306,6 +311,8 @@ static inline bool inheritsFrom(InstructionContext child,
|
||||
case IC_EVEX_L2_W_K:
|
||||
case IC_EVEX_L2_W_B:
|
||||
case IC_EVEX_L2_W_XS_K:
|
||||
case IC_EVEX_L2_W_XS_B:
|
||||
case IC_EVEX_L2_W_XS_K_B:
|
||||
case IC_EVEX_L2_W_XD_K:
|
||||
case IC_EVEX_L2_W_XD_B:
|
||||
case IC_EVEX_L2_W_OPSIZE_K:
|
||||
|
||||
Loading…
Reference in New Issue
Block a user