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Emit comparisons against the sign bit better. Codegen this:
bool %test1(long %X) { %A = setlt long %X, 0 ret bool %A } like this: test1: cmpl $0, 8(%esp) setl %al movzbl %al, %eax ret instead of: test1: movl 8(%esp), %ecx cmpl $0, %ecx setl %al movzbw %al, %ax cmpl $0, 4(%esp) setb %dl movzbw %dl, %dx cmpl $0, %ecx cmove %dx, %ax movzbl %al, %eax ret llvm-svn: 21243
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@ -768,6 +768,16 @@ SDOperand SelectionDAGLegalize::LegalizeOp(SDOperand Op) {
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DAG.getConstant(0, Tmp1.getValueType()));
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break;
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default:
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// If this is a comparison of the sign bit, just look at the top part.
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// X > -1, x < 0
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if (ConstantSDNode *CST = dyn_cast<ConstantSDNode>(Node->getOperand(1)))
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if ((cast<SetCCSDNode>(Node)->getCondition() == ISD::SETLT &&
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CST->getValue() == 0) || // X < 0
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(cast<SetCCSDNode>(Node)->getCondition() == ISD::SETGT &&
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(CST->isAllOnesValue()))) // X > -1
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return DAG.getSetCC(cast<SetCCSDNode>(Node)->getCondition(),
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Node->getValueType(0), LHSHi, RHSHi);
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// FIXME: This generated code sucks.
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ISD::CondCode LowCC;
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switch (cast<SetCCSDNode>(Node)->getCondition()) {
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