From 61f8207ac9786f8723ac0909d4791246c4ea6894 Mon Sep 17 00:00:00 2001 From: Jim Grosbach Date: Tue, 7 Oct 2008 17:42:09 +0000 Subject: [PATCH] Clarify naming and correct conditional so that CMP and CMN instructions get the Rn operand encoded properly llvm-svn: 57252 --- lib/Target/ARM/ARMCodeEmitter.cpp | 13 +++++-------- 1 file changed, 5 insertions(+), 8 deletions(-) diff --git a/lib/Target/ARM/ARMCodeEmitter.cpp b/lib/Target/ARM/ARMCodeEmitter.cpp index a8fe2ea4f19..13f7903402e 100644 --- a/lib/Target/ARM/ARMCodeEmitter.cpp +++ b/lib/Target/ARM/ARMCodeEmitter.cpp @@ -392,14 +392,11 @@ unsigned ARMCodeEmitter::getAddrMode1InstrBinary(const MachineInstr &MI, // Encode first non-shifter register operand if there is one. unsigned Format = TID.TSFlags & ARMII::FormMask; - bool isUnary = (Format == ARMII::DPRdMisc || - Format == ARMII::DPRdIm || - Format == ARMII::DPRdReg || - Format == ARMII::DPRdSoReg || - Format == ARMII::DPRnIm || - Format == ARMII::DPRnReg || - Format == ARMII::DPRnSoReg); - if (!isUnary) { + bool hasRnOperand= !(Format == ARMII::DPRdMisc || + Format == ARMII::DPRdIm || + Format == ARMII::DPRdReg || + Format == ARMII::DPRdSoReg); + if (hasRnOperand) { Binary |= getMachineOpValue(MI, OpIdx) << ARMII::RegRnShift; ++OpIdx; }