From 6271cba6e01f136ee69b8948f47f30b6965d0ffe Mon Sep 17 00:00:00 2001 From: JF Bastien Date: Tue, 18 Jun 2013 23:07:16 +0000 Subject: [PATCH] Small correction to unordered memory code generation of ARM LDRD The information was correct pre-LPAE. llvm-svn: 184253 --- docs/Atomics.rst | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/docs/Atomics.rst b/docs/Atomics.rst index 705d73fbaba..1243f345483 100644 --- a/docs/Atomics.rst +++ b/docs/Atomics.rst @@ -211,7 +211,7 @@ Notes for code generation never stored. A normal load or store instruction is usually sufficient, but note that an unordered load or store cannot be split into multiple instructions (or an instruction which does multiple memory operations, like - ``LDRD`` on ARM). + ``LDRD`` on ARM without LPAE, or not naturally-aligned ``LDRD`` on LPAE ARM). Monotonic ---------