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AMDGPU/GlobalISel: Select s32->s16 G_[US]ITOFP
llvm-svn: 371949
This commit is contained in:
Matt Arsenault
parent
310282b631
commit
62c32a2fa8
@ -753,12 +753,12 @@ def : GCNPat <
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def : GCNPat <
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(f16 (sint_to_fp i32:$src)),
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(V_CVT_F16_F32_e32 (V_CVT_F32_I32_e32 $src))
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(V_CVT_F16_F32_e32 (V_CVT_F32_I32_e32 VSrc_b32:$src))
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>;
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def : GCNPat <
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(f16 (uint_to_fp i32:$src)),
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(V_CVT_F16_F32_e32 (V_CVT_F32_U32_e32 $src))
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(V_CVT_F16_F32_e32 (V_CVT_F32_U32_e32 VSrc_b32:$src))
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>;
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//===----------------------------------------------------------------------===//
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@ -1,3 +1,4 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
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---
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@ -6,27 +7,74 @@ name: sitofp
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legalized: true
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regBankSelected: true
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# GCN-LABEL: name: sitofp
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body: |
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bb.0:
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liveins: $sgpr0, $vgpr0, $vgpr3_vgpr4
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; GCN: [[SGPR:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN-LABEL: name: sitofp
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[COPY1:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[COPY2:%[0-9]+]]:vreg_64 = COPY $vgpr3_vgpr4
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; GCN: [[V_CVT_F32_I32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY]], 0, 0, implicit $exec
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; GCN: [[V_CVT_F32_I32_e64_1:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e64 [[COPY1]], 0, 0, implicit $exec
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; GCN: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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; GCN: FLAT_STORE_DWORD [[COPY2]], [[V_CVT_F32_I32_e64_1]], 0, 0, 0, 0, implicit $exec, implicit $flat_scr :: (store 4, addrspace 1)
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%0:sgpr(s32) = COPY $sgpr0
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; GCN: [[VGPR:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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%1:vgpr(s32) = COPY $vgpr0
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%2:vgpr(p1) = COPY $vgpr3_vgpr4
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; sitofp s
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; GCN: V_CVT_F32_I32_e64 [[SGPR]], 0, 0
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%3:vgpr(s32) = G_SITOFP %0
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; sitofp v
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; GCN: V_CVT_F32_I32_e64 [[VGPR]], 0, 0
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%4:vgpr(s32) = G_SITOFP %1
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G_STORE %3, %2 :: (store 4, addrspace 1)
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G_STORE %4, %2 :: (store 4, addrspace 1)
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...
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---
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name: sitofp_s32_to_s16_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: sitofp_s32_to_s16_vv
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; GCN: liveins: $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $exec
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; GCN: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_SITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: sitofp_s32_to_s16_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: sitofp_s32_to_s16_vs
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; GCN: liveins: $sgpr0
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[V_CVT_F32_I32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_I32_e32 [[COPY]], implicit $exec
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; GCN: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CVT_F32_I32_e32_]], implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s16) = G_SITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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86
test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
Normal file
86
test/CodeGen/AMDGPU/GlobalISel/inst-select-uitofp.mir
Normal file
@ -0,0 +1,86 @@
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# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
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# RUN: llc -march=amdgcn -mcpu=hawaii -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s -check-prefixes=GCN
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---
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name: uitofp_s32_to_s32_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: uitofp_s32_to_s32_vv
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; GCN: liveins: $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s32) = G_UITOFP %0
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$vgpr0 = COPY %1
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...
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---
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name: uitofp_s32_to_s32_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: uitofp_s32_to_s32_vs
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; GCN: liveins: $sgpr0
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[V_CVT_F32_U32_e64_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e64 [[COPY]], 0, 0, implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F32_U32_e64_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s32) = G_UITOFP %0
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$vgpr0 = COPY %1
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...
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---
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name: uitofp_s32_to_s16_vv
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $vgpr0
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; GCN-LABEL: name: uitofp_s32_to_s16_vv
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; GCN: liveins: $vgpr0
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; GCN: [[COPY:%[0-9]+]]:vgpr_32 = COPY $vgpr0
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; GCN: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $exec
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; GCN: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CVT_F32_U32_e32_]], implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
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%0:vgpr(s32) = COPY $vgpr0
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%1:vgpr(s16) = G_UITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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---
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name: uitofp_s32_to_s16_vs
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legalized: true
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regBankSelected: true
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tracksRegLiveness: true
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body: |
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bb.0:
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liveins: $sgpr0
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; GCN-LABEL: name: uitofp_s32_to_s16_vs
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; GCN: liveins: $sgpr0
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; GCN: [[COPY:%[0-9]+]]:sreg_32_xm0 = COPY $sgpr0
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; GCN: [[V_CVT_F32_U32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F32_U32_e32 [[COPY]], implicit $exec
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; GCN: [[V_CVT_F16_F32_e32_:%[0-9]+]]:vgpr_32 = V_CVT_F16_F32_e32 [[V_CVT_F32_U32_e32_]], implicit $exec
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; GCN: $vgpr0 = COPY [[V_CVT_F16_F32_e32_]]
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%0:sgpr(s32) = COPY $sgpr0
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%1:vgpr(s16) = G_UITOFP %0
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%2:vgpr(s32) = G_ANYEXT %1
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$vgpr0 = COPY %2
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...
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@ -143,12 +143,12 @@ body: |
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...
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---
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name: test_sitofp_s32_to_s16
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name: test_sitofp_s16_to_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_sitofp_s32_to_s16
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; CHECK-LABEL: name: test_sitofp_s16_to_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[SITOFP:%[0-9]+]]:_(s16) = G_SITOFP [[COPY]](s32)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[SITOFP]](s16)
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@ -112,12 +112,12 @@ body: |
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...
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---
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name: test_uitofp_s32_to_s16
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name: test_uitofp_s16_to_s32
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body: |
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bb.0:
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liveins: $vgpr0
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; CHECK-LABEL: name: test_uitofp_s32_to_s16
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; CHECK-LABEL: name: test_uitofp_s16_to_s32
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; CHECK: [[COPY:%[0-9]+]]:_(s32) = COPY $vgpr0
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; CHECK: [[UITOFP:%[0-9]+]]:_(s16) = G_UITOFP [[COPY]](s32)
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; CHECK: [[ANYEXT:%[0-9]+]]:_(s32) = G_ANYEXT [[UITOFP]](s16)
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