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AMDGPU: Fix truncate to bool warnings

llvm-svn: 284116
This commit is contained in:
Matt Arsenault 2016-10-13 12:45:16 +00:00
parent df162f15a6
commit 62c9ce83e6

View File

@ -1179,7 +1179,7 @@ static MachineBasicBlock::iterator emitLoadM0FromVGPRLoop(
MachineInstr *SetIdx =
BuildMI(LoopBB, I, DL, TII->get(AMDGPU::S_SET_GPR_IDX_IDX))
.addReg(IdxReg, RegState::Kill);
SetIdx->getOperand(2).setIsUndef(true);
SetIdx->getOperand(2).setIsUndef();
} else {
// Move index from VCC into M0
if (Offset == 0) {
@ -1319,7 +1319,7 @@ static bool setM0ToIndexFromSGPR(const SIInstrInfo *TII,
.addOperand(*Idx)
.addImm(IdxMode);
SetOn->getOperand(3).setIsUndef(AMDGPU::M0);
SetOn->getOperand(3).setIsUndef();
} else {
unsigned Tmp = MRI.createVirtualRegister(&AMDGPU::SReg_32_XM0RegClass);
BuildMI(*MBB, I, DL, TII->get(AMDGPU::S_ADD_I32), Tmp)
@ -1330,7 +1330,7 @@ static bool setM0ToIndexFromSGPR(const SIInstrInfo *TII,
.addReg(Tmp, RegState::Kill)
.addImm(IdxMode);
SetOn->getOperand(3).setIsUndef(AMDGPU::M0);
SetOn->getOperand(3).setIsUndef();
}
return true;
@ -1406,7 +1406,7 @@ static MachineBasicBlock *emitIndirectSrc(MachineInstr &MI,
MachineInstr *SetOn = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_SET_GPR_IDX_ON))
.addImm(0) // Reset inside loop.
.addImm(VGPRIndexMode::SRC0_ENABLE);
SetOn->getOperand(3).setIsUndef(AMDGPU::M0);
SetOn->getOperand(3).setIsUndef();
// Disable again after the loop.
@ -1514,7 +1514,7 @@ static MachineBasicBlock *emitIndirectDst(MachineInstr &MI,
MachineInstr *SetOn = BuildMI(MBB, I, DL, TII->get(AMDGPU::S_SET_GPR_IDX_ON))
.addImm(0) // Reset inside loop.
.addImm(VGPRIndexMode::DST_ENABLE);
SetOn->getOperand(3).setIsUndef(AMDGPU::M0);
SetOn->getOperand(3).setIsUndef();
// Disable again after the loop.
BuildMI(MBB, std::next(I), DL, TII->get(AMDGPU::S_SET_GPR_IDX_OFF));