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[X86] Add SimplifyDemandedBits support for PEXTRB/PEXTRW (PR39709)

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Test case will be included in a followup - its being used but its tricky to show a case that isn't caught at a later stage anyway.

llvm-svn: 360588
This commit is contained in:
Simon Pilgrim 2019-05-13 15:31:27 +00:00
parent 445f07eaf1
commit 6329a0871e
1 changed files with 6 additions and 1 deletions
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7
lib/Target/X86/X86ISelLowering.cpp
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@ -35112,8 +35112,13 @@ static SDValue combineExtractVectorElt(SDNode *N, SelectionDAG &DAG,
// X86ISD::PEXTRW/X86ISD::PEXTRB in:
// XFormVExtractWithShuffleIntoLoad, combineHorizontalPredicateResult and
// combineBasicSADPattern.
if (IsPextr)
if (IsPextr) {
const TargetLowering &TLI = DAG.getTargetLoweringInfo();
if (TLI.SimplifyDemandedBits(
SDValue(N, 0), APInt::getAllOnesValue(VT.getSizeInBits()), DCI))
return SDValue(N, 0);
return SDValue();
}
if (SDValue NewOp = XFormVExtractWithShuffleIntoLoad(N, DAG, DCI))
return NewOp;