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Support Thumb mode encoding of NEON instructions.
llvm-svn: 107068
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4fe5512827
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@ -1585,6 +1585,15 @@ static unsigned encodeNEONRm(const MachineInstr &MI, unsigned OpIdx) {
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return Binary;
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}
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/// convertNEONDataProcToThumb - Convert the ARM mode encoding for a NEON
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/// data-processing instruction to the corresponding Thumb encoding.
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static unsigned convertNEONDataProcToThumb(unsigned Binary) {
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assert((Binary & 0xfe000000) == 0xf2000000 &&
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"not an ARM NEON data-processing instruction");
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unsigned UBit = (Binary >> 24) & 1;
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return 0xef000000 | (UBit << 28) | (Binary & 0xffffff);
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}
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void ARMCodeEmitter::emitNEONGetLaneInstruction(const MachineInstr &MI) {
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unsigned Binary = getBinaryCodeForInstr(MI);
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@ -1630,6 +1639,8 @@ void ARMCodeEmitter::emitNEON1RegModImmInstruction(const MachineInstr &MI) {
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Binary |= (Imm3 << 16);
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unsigned Imm4 = Imm & 0xf;
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Binary |= Imm4;
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if (Subtarget->isThumb())
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Binary = convertNEONDataProcToThumb(Binary);
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emitWordLE(Binary);
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}
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@ -1642,6 +1653,8 @@ void ARMCodeEmitter::emitNEON2RegInstruction(const MachineInstr &MI) {
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if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1)
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++OpIdx;
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Binary |= encodeNEONRm(MI, OpIdx);
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if (Subtarget->isThumb())
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Binary = convertNEONDataProcToThumb(Binary);
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// FIXME: This does not handle VDUPfdf or VDUPfqf.
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emitWordLE(Binary);
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}
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@ -1658,6 +1671,8 @@ void ARMCodeEmitter::emitNEON3RegInstruction(const MachineInstr &MI) {
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if (TID.getOperandConstraint(OpIdx, TOI::TIED_TO) != -1)
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++OpIdx;
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Binary |= encodeNEONRm(MI, OpIdx);
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if (Subtarget->isThumb())
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Binary = convertNEONDataProcToThumb(Binary);
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// FIXME: This does not handle VMOVDneon or VMOVQ.
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emitWordLE(Binary);
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}
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