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[AMDGPU] Tune inlining parameters for AMDGPU target
Summary: Since the target has no significant advantage of vectorization, vector instructions bous threshold bonus should be optional. amdgpu-inline-arg-alloca-cost parameter default value and the target InliningThresholdMultiplier value tuned then respectively. Reviewers: arsenm, rampitec Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, eraman, hiraditya, haicheng, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D64642 llvm-svn: 366348
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@ -263,6 +263,18 @@ public:
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/// individual classes of instructions would be better.
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unsigned getInliningThresholdMultiplier() const;
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/// \returns Vector bonus in percent.
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///
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/// Vector bonuses: We want to more aggressively inline vector-dense kernels
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/// and apply this bonus based on the percentage of vector instructions. A
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/// bonus is applied if the vector instructions exceed 50% and half that amount
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/// is applied if it exceeds 10%. Note that these bonuses are some what
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/// arbitrary and evolved over time by accident as much as because they are
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/// principled bonuses.
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/// FIXME: It would be nice to base the bonus values on something more
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/// scientific. A target may has no bonus on vector instructions.
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int getInlinerVectorBonusPercent() const;
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/// Estimate the cost of an intrinsic when lowered.
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///
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/// Mirrors the \c getCallCost method but uses an intrinsic identifier.
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@ -1128,6 +1140,7 @@ public:
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virtual int getCallCost(const Function *F,
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ArrayRef<const Value *> Arguments, const User *U) = 0;
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virtual unsigned getInliningThresholdMultiplier() = 0;
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virtual int getInlinerVectorBonusPercent() = 0;
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virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
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ArrayRef<Type *> ParamTys, const User *U) = 0;
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virtual int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
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@ -1351,6 +1364,9 @@ public:
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unsigned getInliningThresholdMultiplier() override {
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return Impl.getInliningThresholdMultiplier();
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}
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int getInlinerVectorBonusPercent() override {
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return Impl.getInlinerVectorBonusPercent();
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}
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int getIntrinsicCost(Intrinsic::ID IID, Type *RetTy,
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ArrayRef<Type *> ParamTys, const User *U = nullptr) override {
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return Impl.getIntrinsicCost(IID, RetTy, ParamTys, U);
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@ -140,6 +140,8 @@ public:
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unsigned getInliningThresholdMultiplier() { return 1; }
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int getInlinerVectorBonusPercent() { return 150; }
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unsigned getMemcpyCost(const Instruction *I) {
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return TTI::TCC_Expensive;
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}
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@ -427,6 +427,8 @@ public:
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unsigned getInliningThresholdMultiplier() { return 1; }
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int getInlinerVectorBonusPercent() { return 150; }
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void getUnrollingPreferences(Loop *L, ScalarEvolution &SE,
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TTI::UnrollingPreferences &UP) {
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// This unrolling functionality is target independent, but to provide some
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@ -880,15 +880,6 @@ void CallAnalyzer::updateThreshold(CallBase &Call, Function &Callee) {
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// basic block at the given callsite context. This is speculatively applied
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// and withdrawn if more than one basic block is seen.
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//
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// Vector bonuses: We want to more aggressively inline vector-dense kernels
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// and apply this bonus based on the percentage of vector instructions. A
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// bonus is applied if the vector instructions exceed 50% and half that amount
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// is applied if it exceeds 10%. Note that these bonuses are some what
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// arbitrary and evolved over time by accident as much as because they are
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// principled bonuses.
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// FIXME: It would be nice to base the bonus values on something more
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// scientific.
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//
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// LstCallToStaticBonus: This large bonus is applied to ensure the inlining
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// of the last call to a static function as inlining such functions is
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// guaranteed to reduce code size.
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@ -896,7 +887,7 @@ void CallAnalyzer::updateThreshold(CallBase &Call, Function &Callee) {
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// These bonus percentages may be set to 0 based on properties of the caller
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// and the callsite.
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int SingleBBBonusPercent = 50;
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int VectorBonusPercent = 150;
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int VectorBonusPercent = TTI.getInlinerVectorBonusPercent();
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int LastCallToStaticBonus = InlineConstants::LastCallToStaticBonus;
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// Lambda to set all the above bonus and bonus percentages to 0.
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@ -176,6 +176,10 @@ unsigned TargetTransformInfo::getInliningThresholdMultiplier() const {
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return TTIImpl->getInliningThresholdMultiplier();
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}
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int TargetTransformInfo::getInlinerVectorBonusPercent() const {
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return TTIImpl->getInlinerVectorBonusPercent();
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}
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int TargetTransformInfo::getGEPCost(Type *PointeeType, const Value *Ptr,
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ArrayRef<const Value *> Operands) const {
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return TTIImpl->getGEPCost(PointeeType, Ptr, Operands);
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@ -39,7 +39,7 @@ using namespace llvm;
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#define DEBUG_TYPE "inline"
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static cl::opt<int>
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ArgAllocaCost("amdgpu-inline-arg-alloca-cost", cl::Hidden, cl::init(2200),
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ArgAllocaCost("amdgpu-inline-arg-alloca-cost", cl::Hidden, cl::init(1500),
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cl::desc("Cost of alloca argument"));
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// If the amount of scratch memory to eliminate exceeds our ability to allocate
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@ -191,7 +191,9 @@ public:
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bool areInlineCompatible(const Function *Caller,
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const Function *Callee) const;
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unsigned getInliningThresholdMultiplier() { return 9; }
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unsigned getInliningThresholdMultiplier() { return 7; }
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int getInlinerVectorBonusPercent() { return 0; }
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int getArithmeticReductionCost(unsigned Opcode,
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Type *Ty,
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@ -28,15 +28,8 @@ if.end: ; preds = %if.then, %entry
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define coldcc void @foo_private_ptr2(float addrspace(5)* nocapture %p1, float addrspace(5)* nocapture %p2) {
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entry:
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%tmp1 = load float, float addrspace(5)* %p1, align 4
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%cmp = fcmp ogt float %tmp1, 1.000000e+00
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br i1 %cmp, label %if.then, label %if.end
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if.then: ; preds = %entry
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%div = fdiv float 2.000000e+00, %tmp1
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store float %div, float addrspace(5)* %p2, align 4
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br label %if.end
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if.end: ; preds = %if.then, %entry
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ret void
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}
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31
test/Transforms/Inline/AMDGPU/inline-amdgpu-vecbonus.ll
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31
test/Transforms/Inline/AMDGPU/inline-amdgpu-vecbonus.ll
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@ -0,0 +1,31 @@
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; RUN: opt -S -mtriple=amdgcn-unknown-amdhsa -amdgpu-inline --inline-threshold=1 < %s | FileCheck %s
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define hidden <16 x i32> @div_vecbonus(<16 x i32> %x, <16 x i32> %y) {
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entry:
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%div.1 = udiv <16 x i32> %x, %y
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%div.2 = udiv <16 x i32> %div.1, %y
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%div.3 = udiv <16 x i32> %div.2, %y
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%div.4 = udiv <16 x i32> %div.3, %y
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%div.5 = udiv <16 x i32> %div.4, %y
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%div.6 = udiv <16 x i32> %div.5, %y
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%div.7 = udiv <16 x i32> %div.6, %y
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%div.8 = udiv <16 x i32> %div.7, %y
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%div.9 = udiv <16 x i32> %div.8, %y
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%div.10 = udiv <16 x i32> %div.9, %y
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%div.11 = udiv <16 x i32> %div.10, %y
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%div.12 = udiv <16 x i32> %div.11, %y
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ret <16 x i32> %div.12
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}
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; CHECK-LABEL: define amdgpu_kernel void @caller_vecbonus
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; CHECK-NOT: udiv
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; CHECK: tail call <16 x i32> @div_vecbonus
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; CHECK: ret void
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define amdgpu_kernel void @caller_vecbonus(<16 x i32> addrspace(1)* nocapture %x, <16 x i32> addrspace(1)* nocapture readonly %y) {
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entry:
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%tmp = load <16 x i32>, <16 x i32> addrspace(1)* %x
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%tmp1 = load <16 x i32>, <16 x i32> addrspace(1)* %y
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%div.i = tail call <16 x i32> @div_vecbonus(<16 x i32> %tmp, <16 x i32> %tmp1)
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store <16 x i32> %div.i, <16 x i32> addrspace(1)* %x
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ret void
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}
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