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Add a couple llvm_unreachables. Add a message to several others.
llvm-svn: 162263
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@ -1294,8 +1294,7 @@ X86InstrInfo::isCoalescableExtInstr(const MachineInstr &MI,
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SrcReg = MI.getOperand(1).getReg();
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DstReg = MI.getOperand(0).getReg();
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switch (MI.getOpcode()) {
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default:
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llvm_unreachable(0);
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default: llvm_unreachable("Unreachable!");
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case X86::MOVSX16rr8:
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case X86::MOVZX16rr8:
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case X86::MOVSX32rr8:
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@ -1630,7 +1629,7 @@ void X86InstrInfo::reMaterialize(MachineBasicBlock &MBB,
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case X86::MOV64r0: {
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if (!isSafeToClobberEFLAGS(MBB, I)) {
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switch (Opc) {
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default: break;
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default: llvm_unreachable("Unreachable!");
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case X86::MOV8r0: Opc = X86::MOV8ri; break;
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case X86::MOV16r0: Opc = X86::MOV16ri; break;
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case X86::MOV32r0: Opc = X86::MOV32ri; break;
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@ -1703,8 +1702,7 @@ X86InstrInfo::convertToThreeAddressWithLEA(unsigned MIOpc,
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MachineInstrBuilder MIB = BuildMI(*MFI, MBBI, MI->getDebugLoc(),
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get(Opc), leaOutReg);
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switch (MIOpc) {
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default:
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llvm_unreachable(0);
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default: llvm_unreachable("Unreachable!");
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case X86::SHL16ri: {
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unsigned ShAmt = MI->getOperand(2).getImm();
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MIB.addReg(0).addImm(1 << ShAmt)
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@ -3137,7 +3135,7 @@ optimizeCompareInstr(MachineInstr *CmpInstr, unsigned SrcReg, unsigned SrcReg2,
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return false;
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// There is no use of the destination register, we can replace SUB with CMP.
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switch (CmpInstr->getOpcode()) {
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default: llvm_unreachable(0);
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default: llvm_unreachable("Unreachable!");
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case X86::SUB64rm: NewOpcode = X86::CMP64rm; break;
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case X86::SUB32rm: NewOpcode = X86::CMP32rm; break;
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case X86::SUB16rm: NewOpcode = X86::CMP16rm; break;
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@ -4046,7 +4044,6 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
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getUndefRegState(MO.isUndef()));
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}
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// Change CMP32ri r, 0 back to TEST32rr r, r, etc.
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unsigned NewOpc = 0;
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switch (DataMI->getOpcode()) {
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default: break;
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case X86::CMP64ri32:
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@ -4059,8 +4056,9 @@ bool X86InstrInfo::unfoldMemoryOperand(MachineFunction &MF, MachineInstr *MI,
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MachineOperand &MO0 = DataMI->getOperand(0);
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MachineOperand &MO1 = DataMI->getOperand(1);
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if (MO1.getImm() == 0) {
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unsigned NewOpc;
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switch (DataMI->getOpcode()) {
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default: break;
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default: llvm_unreachable("Unreachable!");
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case X86::CMP64ri8:
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case X86::CMP64ri32: NewOpc = X86::TEST64rr; break;
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case X86::CMP32ri8:
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