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[mips] Use less instruction to load zero into FPR by li.s / li.d pseudos

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If `li.s` or `li.d` loads zero into a FPR, it's not necessary to load
zero into `at` GPR register and then move its value into a floating
point register. We can use as a source register the `zero / $0` one.

Differential Revision: https://reviews.llvm.org/D68777

llvm-svn: 374597
This commit is contained in:
Simon Atanasyan 2019-10-11 21:51:23 +00:00
parent aaf0a6880e
commit 649e4c7138
3 changed files with 26 additions and 29 deletions
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31
lib/Target/Mips/AsmParser/MipsAsmParser.cpp
View File

@ -3345,13 +3345,16 @@ bool MipsAsmParser::expandLoadSingleImmToFPR(MCInst &Inst, SMLoc IDLoc,
uint32_t ImmOp32 = covertDoubleImmToSingleImm(ImmOp64);
unsigned TmpReg = getATReg(IDLoc);
if (!TmpReg)
return true;
unsigned TmpReg = Mips::ZERO;
if (ImmOp32 != 0) {
TmpReg = getATReg(IDLoc);
if (!TmpReg)
return true;
}
if (Lo_32(ImmOp64) == 0) {
if (loadImmediate(ImmOp32, TmpReg, Mips::NoRegister, true, true, IDLoc, Out,
STI))
if (TmpReg != Mips::ZERO && loadImmediate(ImmOp32, TmpReg, Mips::NoRegister,
true, false, IDLoc, Out, STI))
return true;
TOut.emitRR(Mips::MTC1, FirstReg, TmpReg, IDLoc, STI);
return false;
@ -3469,24 +3472,26 @@ bool MipsAsmParser::expandLoadDoubleImmToFPR(MCInst &Inst, bool Is64FPU,
uint32_t LoImmOp64 = Lo_32(ImmOp64);
uint32_t HiImmOp64 = Hi_32(ImmOp64);
unsigned TmpReg = getATReg(IDLoc);
if (!TmpReg)
return true;
unsigned TmpReg = Mips::ZERO;
if (ImmOp64 != 0) {
TmpReg = getATReg(IDLoc);
if (!TmpReg)
return true;
}
if ((LoImmOp64 == 0) &&
!((HiImmOp64 & 0xffff0000) && (HiImmOp64 & 0x0000ffff))) {
// FIXME: In the case where the constant is zero, we can load the
// register directly from the zero register.
if (isABI_N32() || isABI_N64()) {
if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, false, IDLoc,
if (TmpReg != Mips::ZERO &&
loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, false, IDLoc,
Out, STI))
return true;
TOut.emitRR(Mips::DMTC1, FirstReg, TmpReg, IDLoc, STI);
return false;
}
if (loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, false, IDLoc,
if (TmpReg != Mips::ZERO &&
loadImmediate(HiImmOp64, TmpReg, Mips::NoRegister, true, false, IDLoc,
Out, STI))
return true;

18
test/MC/Mips/macro-li.d.s
View File

@ -228,24 +228,18 @@ li.d $4, 12345678910123456789.12345678910
# N32-N64: ld $4, 0($1) # encoding: [0x00,0x00,0x24,0xdc]
li.d $f4, 0
# O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f5 # encoding: [0x00,0x28,0x80,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
# CHECK-MIPS32r2: mthc1 $zero, $f4 # encoding: [0x00,0x20,0xe0,0x44]
# N32-N64: dmtc1 $zero, $f4 # encoding: [0x00,0x20,0xa0,0x44]
li.d $f4, 0.0
# O32: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# O32: mtc1 $1, $f5 # encoding: [0x00,0x28,0x81,0x44]
# O32: mtc1 $zero, $f5 # encoding: [0x00,0x28,0x80,0x44]
# O32: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# CHECK-MIPS32r2: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
# CHECK-MIPS32r2: mthc1 $1, $f4 # encoding: [0x00,0x20,0xe1,0x44]
# N32-N64: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# N32-N64: dmtc1 $1, $f4 # encoding: [0x00,0x20,0xa1,0x44]
# CHECK-MIPS32r2: mthc1 $zero, $f4 # encoding: [0x00,0x20,0xe0,0x44]
# N32-N64: dmtc1 $zero, $f4 # encoding: [0x00,0x20,0xa0,0x44]
li.d $f4, 1.12345
# ALL: .section .rodata,"a",@progbits

6
test/MC/Mips/macro-li.s.s
View File

@ -45,12 +45,10 @@ li.s $4, 12345678910123456789.12345678910
# ALL: ori $4, $4, 21674 # encoding: [0xaa,0x54,0x84,0x34]
li.s $f4, 0
# ALL: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# ALL: mtc1 $1, $f4 # encoding: [0x00,0x20,0x81,0x44]
# ALL: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
li.s $f4, 0.0
# ALL: addiu $1, $zero, 0 # encoding: [0x00,0x00,0x01,0x24]
# ALL: mtc1 $1, $f4 # encoding: [0x00,0x20,0x81,0x44]
# ALL: mtc1 $zero, $f4 # encoding: [0x00,0x20,0x80,0x44]
li.s $f4, 1.12345
# ALL: .section .rodata,"a",@progbits