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Sigh, not my day. Fix typo.
llvm-svn: 23166
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@ -1099,7 +1099,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
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return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
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case ISD::AssertZext:
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SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
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return (Mask & ((1ULL << SrcBits)-1) == 0; // Returning only the zext bits.
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return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
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case ISD::AND:
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// (X & C1) & C2 == 0 iff C1 & C2 == 0.
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if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))
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