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Sigh, not my day. Fix typo.

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llvm-svn: 23166
This commit is contained in:
Nate Begeman 2005-08-31 00:43:49 +00:00
parent d286f16856
commit 64ea782435
1 changed files with 1 additions and 1 deletions
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lib/CodeGen/SelectionDAG/SelectionDAG.cpp
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@ -1099,7 +1099,7 @@ static bool MaskedValueIsZero(const SDOperand &Op, uint64_t Mask,
return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI); return MaskedValueIsZero(Op.getOperand(0),Mask & ((1ULL << SrcBits)-1),TLI);
case ISD::AssertZext: case ISD::AssertZext:
SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT()); SrcBits = MVT::getSizeInBits(cast<VTSDNode>(Op.getOperand(1))->getVT());
return (Mask & ((1ULL << SrcBits)-1) == 0; // Returning only the zext bits. return (Mask & ((1ULL << SrcBits)-1)) == 0; // Returning only the zext bits.
case ISD::AND: case ISD::AND:
// (X & C1) & C2 == 0 iff C1 & C2 == 0. // (X & C1) & C2 == 0 iff C1 & C2 == 0.
if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1))) if (ConstantSDNode *AndRHS = dyn_cast<ConstantSDNode>(Op.getOperand(1)))