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[AMDGPU] [TableGen] Clean up !if(!eq(boolean, 1) and related booleans
Differential Revision: https://reviews.llvm.org/D89796
This commit is contained in:
Paul C. Anagnostopoulos
parent
e5bb2c0aa5
commit
652c96c70e
@ -1651,20 +1651,20 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
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(ins),
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/* else */
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!if (!eq(NumSrcArgs, 1),
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP1 with modifiers
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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clampmod0:$clamp, omod0:$omod)
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/* else */,
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// VOP1 without modifiers
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!if (!eq(HasIntClamp, 1),
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!if (HasIntClamp,
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(ins Src0RC:$src0, clampmod0:$clamp),
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(ins Src0RC:$src0))
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/* endif */ ),
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!if (!eq(NumSrcArgs, 2),
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP 2 with modifiers
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!if( !eq(HasOMod, 1),
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!if(HasOMod,
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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clampmod0:$clamp, omod0:$omod),
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@ -1673,21 +1673,21 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
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clampmod0:$clamp))
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/* else */,
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// VOP2 without modifiers
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!if (!eq(HasIntClamp, 1),
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!if (HasIntClamp,
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(ins Src0RC:$src0, Src1RC:$src1, clampmod0:$clamp),
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(ins Src0RC:$src0, Src1RC:$src1))
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/* endif */ )
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/* NumSrcArgs == 3 */,
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!if (!eq(HasModifiers, 1),
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!if (!eq(HasSrc2Mods, 1),
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!if (HasModifiers,
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!if (HasSrc2Mods,
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// VOP3 with modifiers
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!if (!eq(HasOMod, 1),
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!if (HasOMod,
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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Src2Mod:$src2_modifiers, Src2RC:$src2,
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clampmod0:$clamp, omod0:$omod),
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!if (!eq(HasIntClamp, 1),
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!if (HasIntClamp,
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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Src2Mod:$src2_modifiers, Src2RC:$src2,
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@ -1696,11 +1696,11 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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Src2Mod:$src2_modifiers, Src2RC:$src2))),
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// VOP3 with modifiers except src2
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!if (!eq(HasOMod, 1),
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!if (HasOMod,
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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Src2RC:$src2, clampmod0:$clamp, omod0:$omod),
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!if (!eq(HasIntClamp, 1),
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!if (HasIntClamp,
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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Src2RC:$src2, clampmod0:$clamp),
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@ -1709,7 +1709,7 @@ class getIns64 <RegisterOperand Src0RC, RegisterOperand Src1RC,
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Src2RC:$src2))))
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/* else */,
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// VOP3 without modifiers
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!if (!eq(HasIntClamp, 1),
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!if (HasIntClamp,
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(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2, clampmod0:$clamp),
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(ins Src0RC:$src0, Src1RC:$src1, Src2RC:$src2))
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/* endif */ ))));
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@ -1791,7 +1791,7 @@ class getInsDPP <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src1
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(ins dpp_ctrl:$dpp_ctrl, row_mask:$row_mask,
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bank_mask:$bank_mask, bound_ctrl:$bound_ctrl),
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!if (!eq(NumSrcArgs, 1),
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP1_DPP with modifiers
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(ins DstRC:$old, Src0Mod:$src0_modifiers,
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Src0RC:$src0, dpp_ctrl:$dpp_ctrl, row_mask:$row_mask,
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@ -1803,7 +1803,7 @@ class getInsDPP <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src1
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bank_mask:$bank_mask, bound_ctrl:$bound_ctrl)
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/* endif */)
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/* NumSrcArgs == 2 */,
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP2_DPP with modifiers
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(ins DstRC:$old,
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Src0Mod:$src0_modifiers, Src0RC:$src0,
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@ -1834,7 +1834,7 @@ class getInsDPP8 <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src
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// VOP1 without input operands (V_NOP)
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(ins dpp8:$dpp8, FI:$fi),
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!if (!eq(NumSrcArgs, 1),
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP1_DPP with modifiers
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(ins DstRC:$old, Src0Mod:$src0_modifiers,
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Src0RC:$src0, dpp8:$dpp8, FI:$fi)
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@ -1843,7 +1843,7 @@ class getInsDPP8 <RegisterOperand DstRC, RegisterClass Src0RC, RegisterClass Src
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(ins DstRC:$old, Src0RC:$src0, dpp8:$dpp8, FI:$fi)
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/* endif */)
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/* NumSrcArgs == 2 */,
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!if (!eq(HasModifiers, 1),
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!if (HasModifiers,
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// VOP2_DPP with modifiers
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(ins DstRC:$old,
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Src0Mod:$src0_modifiers, Src0RC:$src0,
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@ -1867,7 +1867,7 @@ class getInsSDWA <RegisterOperand Src0RC, RegisterOperand Src1RC, int NumSrcArgs
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(ins),
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!if(!eq(NumSrcArgs, 1),
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// VOP1
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!if(!eq(HasSDWAOMod, 0),
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!if(!not(HasSDWAOMod),
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// VOP1_SDWA without omod
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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clampmod:$clamp,
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@ -1885,7 +1885,7 @@ class getInsSDWA <RegisterOperand Src0RC, RegisterOperand Src1RC, int NumSrcArgs
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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clampmod:$clamp, src0_sel:$src0_sel, src1_sel:$src1_sel),
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// VOP2_SDWA
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!if(!eq(HasSDWAOMod, 0),
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!if(!not(HasSDWAOMod),
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// VOP2_SDWA without omod
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(ins Src0Mod:$src0_modifiers, Src0RC:$src0,
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Src1Mod:$src1_modifiers, Src1RC:$src1,
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@ -1945,7 +1945,7 @@ class getAsm64 <bit HasDst, int NumSrcArgs, bit HasIntClamp, bit HasModifiers,
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string src2 = !if(!eq(NumSrcArgs, 3), " $src2_modifiers", "");
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string iclamp = !if(HasIntClamp, "$clamp", "");
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string ret =
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!if(!eq(HasModifiers, 0),
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!if(!not(HasModifiers),
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getAsm32<HasDst, NumSrcArgs, DstVT>.ret # iclamp,
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dst#", "#src0#src1#src2#"$clamp"#!if(HasOMod, "$omod", ""));
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}
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@ -2007,7 +2007,7 @@ class getAsmDPP <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT =
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string src1 = !if(!eq(NumSrcArgs, 1), "",
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!if(!eq(NumSrcArgs, 2), " $src1_modifiers",
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" $src1_modifiers,"));
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string args = !if(!eq(HasModifiers, 0),
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string args = !if(!not(HasModifiers),
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getAsm32<0, NumSrcArgs, DstVT>.ret,
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", "#src0#src1);
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string ret = dst#args#" $dpp_ctrl$row_mask$bank_mask$bound_ctrl";
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@ -2027,7 +2027,7 @@ class getAsmDPP8 <bit HasDst, int NumSrcArgs, bit HasModifiers, ValueType DstVT
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string src1 = !if(!eq(NumSrcArgs, 1), "",
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!if(!eq(NumSrcArgs, 2), " $src1_modifiers",
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" $src1_modifiers,"));
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string args = !if(!eq(HasModifiers, 0),
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string args = !if(!not(HasModifiers),
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getAsm32<0, NumSrcArgs, DstVT>.ret,
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", "#src0#src1);
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string ret = dst#args#"$dpp8$fi";
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@ -2070,7 +2070,7 @@ class getAsmSDWA9 <bit HasDst, bit HasOMod, int NumSrcArgs,
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"");
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string src0 = "$src0_modifiers";
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string src1 = "$src1_modifiers";
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string out_mods = !if(!eq(HasOMod, 0), "$clamp", "$clamp$omod");
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string out_mods = !if(!not(HasOMod), "$clamp", "$clamp$omod");
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string args = !if(!eq(NumSrcArgs, 0), "",
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!if(!eq(NumSrcArgs, 1),
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", "#src0,
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