RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00
Code Issues Projects Releases Wiki Activity

GlobalISel: translate float/int conversion instructions.

Browse Source 
llvm-svn: 279310
This commit is contained in:
Tim Northover 2016-08-19 20:09:11 +00:00
parent 3f2d517d28
commit 657b8082b4
4 changed files with 96 additions and 4 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

17
include/llvm/CodeGen/GlobalISel/IRTranslator.h
View File

@ -205,6 +205,19 @@ private:
bool translateTrunc(const User &U) {
return translateCast(TargetOpcode::G_TRUNC, U);
}
bool translateFPToUI(const User &U) {
return translateCast(TargetOpcode::G_FPTOUI, U);
}
bool translateFPToSI(const User &U) {
return translateCast(TargetOpcode::G_FPTOSI, U);
}
bool translateUIToFP(const User &U) {
return translateCast(TargetOpcode::G_UITOFP, U);
}
bool translateSIToFP(const User &U) {
return translateCast(TargetOpcode::G_SITOFP, U);
}
bool translateUnreachable(const User &U) { return true; }
bool translateSExt(const User &U) {
@ -255,10 +268,6 @@ private:
bool translateFence(const User &U) { return false; }
bool translateAtomicCmpXchg(const User &U) { return false; }
bool translateAtomicRMW(const User &U) { return false; }
bool translateFPToUI(const User &U) { return false; }
bool translateFPToSI(const User &U) { return false; }
bool translateUIToFP(const User &U) { return false; }
bool translateSIToFP(const User &U) { return false; }
bool translateFPTrunc(const User &U) { return false; }
bool translateFPExt(const User &U) { return false; }
bool translateAddrSpaceCast(const User &U) { return false; }

28
include/llvm/Target/GenericOpcodes.td
View File

@ -247,6 +247,34 @@ def G_SMULO : Instruction {
let isCommutable = 1;
}
//------------------------------------------------------------------------------
// Floating Point Unary Ops.
//------------------------------------------------------------------------------
def G_FPTOSI : Instruction {
let OutOperandList = (outs unknown:$dst);
let InOperandList = (ins unknown:$src);
let hasSideEffects = 0;
}
def G_FPTOUI : Instruction {
let OutOperandList = (outs unknown:$dst);
let InOperandList = (ins unknown:$src);
let hasSideEffects = 0;
}
def G_SITOFP : Instruction {
let OutOperandList = (outs unknown:$dst);
let InOperandList = (ins unknown:$src);
let hasSideEffects = 0;
}
def G_UITOFP : Instruction {
let OutOperandList = (outs unknown:$dst);
let InOperandList = (ins unknown:$src);
let hasSideEffects = 0;
}
//------------------------------------------------------------------------------
// Floating Point Binary ops.
//------------------------------------------------------------------------------

11
include/llvm/Target/TargetOpcodes.def
View File

@ -304,6 +304,17 @@ HANDLE_TARGET_OPCODE(G_FDIV)
/// Generic FP remainder.
HANDLE_TARGET_OPCODE(G_FREM)
/// Generic float to signed-int conversion
HANDLE_TARGET_OPCODE(G_FPTOSI)
/// Generic float to unsigned-int conversion
HANDLE_TARGET_OPCODE(G_FPTOUI)
/// Generic signed-int to float conversion
HANDLE_TARGET_OPCODE(G_SITOFP)
/// Generic unsigned-int to float conversion
HANDLE_TARGET_OPCODE(G_UITOFP)
/// Generic BRANCH instruction. This is an unconditional branch.
HANDLE_TARGET_OPCODE(G_BR)

44
test/CodeGen/AArch64/GlobalISel/arm64-irtranslator.ll
View File

@ -740,3 +740,47 @@ define i32 @test_select(i1 %tst, i32 %lhs, i32 %rhs) {
%res = select i1 %tst, i32 %lhs, i32 %rhs
ret i32 %res
}
; CHECK-LABEL: name: test_fptosi
; CHECK: [[FPADDR:%[0-9]+]](64) = COPY %x0
; CHECK: [[FP:%[0-9]+]](32) = G_LOAD { s32, p0 } [[FPADDR]]
; CHECK: [[RES:%[0-9]+]](64) = G_FPTOSI { s64, s32 } [[FP]]
; CHECK: %x0 = COPY [[RES]]
define i64 @test_fptosi(float* %fp.addr) {
%fp = load float, float* %fp.addr
%res = fptosi float %fp to i64
ret i64 %res
}
; CHECK-LABEL: name: test_fptoui
; CHECK: [[FPADDR:%[0-9]+]](64) = COPY %x0
; CHECK: [[FP:%[0-9]+]](32) = G_LOAD { s32, p0 } [[FPADDR]]
; CHECK: [[RES:%[0-9]+]](64) = G_FPTOUI { s64, s32 } [[FP]]
; CHECK: %x0 = COPY [[RES]]
define i64 @test_fptoui(float* %fp.addr) {
%fp = load float, float* %fp.addr
%res = fptoui float %fp to i64
ret i64 %res
}
; CHECK-LABEL: name: test_sitofp
; CHECK: [[ADDR:%[0-9]+]](64) = COPY %x0
; CHECK: [[IN:%[0-9]+]](32) = COPY %w1
; CHECK: [[FP:%[0-9]+]](64) = G_SITOFP { s64, s32 } [[IN]]
; CHECK: G_STORE { s64, p0 } [[FP]], [[ADDR]]
define void @test_sitofp(double* %addr, i32 %in) {
%fp = sitofp i32 %in to double
store double %fp, double* %addr
ret void
}
; CHECK-LABEL: name: test_uitofp
; CHECK: [[ADDR:%[0-9]+]](64) = COPY %x0
; CHECK: [[IN:%[0-9]+]](32) = COPY %w1
; CHECK: [[FP:%[0-9]+]](64) = G_UITOFP { s64, s32 } [[IN]]
; CHECK: G_STORE { s64, p0 } [[FP]], [[ADDR]]
define void @test_uitofp(double* %addr, i32 %in) {
%fp = uitofp i32 %in to double
store double %fp, double* %addr
ret void
}