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Addd (shl x, 1) ==> (shl x, x) peepholes.
llvm-svn: 25123
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@ -1343,7 +1343,6 @@ let isTwoAddress = 0 in {
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}
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}
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// Shift instructions
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// Shift instructions
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// FIXME: provide shorter instructions when imm8 == 1
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def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
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def SHL8rCL : I<0xD2, MRM4r, (ops R8 :$dst, R8 :$src),
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"shl{b} {%cl, $dst|$dst, %CL}",
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"shl{b} {%cl, $dst|$dst, %CL}",
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[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
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[(set R8:$dst, (shl R8:$src, CL))]>, Imp<[CL],[]>;
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@ -2756,3 +2755,13 @@ def FLDCW16m : I<0xD9, MRM5m, // X87 control world = [mem16]
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//===----------------------------------------------------------------------===//
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//===----------------------------------------------------------------------===//
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def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", []>, TB, Imp<[],[EAX,EDX]>;
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def RDTSC : I<0x31, RawFrm, (ops), "rdtsc", []>, TB, Imp<[],[EAX,EDX]>;
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//===----------------------------------------------------------------------===//
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// Some peepholes
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//===----------------------------------------------------------------------===//
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// (shl x, 1) ==> (add x, x)
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def : Pat<(shl R8 :$src1, (i8 1)), (ADD8rr R8 :$src1, R8 :$src1)>;
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def : Pat<(shl R16:$src1, (i8 1)), (ADD16rr R16:$src1, R16:$src1)>;
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def : Pat<(shl R32:$src1, (i8 1)), (ADD32rr R32:$src1, R32:$src1)>;
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