RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 19:12:56 +02:00
Code Issues Projects Releases Wiki Activity

[mips][msa] Added MSA.txt to describe instruction selection quirks.

Browse Source 
This file contains notes about the instruction selection for MSA. For example,
it notes that ilvl.d is cannot be selected because ilvev.d covers the same
cases and is selected instead of ilvl.d.

llvm-svn: 191507
This commit is contained in:
Daniel Sanders 2013-09-27 10:42:22 +00:00
parent 3f3aef8ded
commit 66425f8a3b
1 changed files with 30 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

30
lib/Target/Mips/MSA.txt Normal file
View File

@ -0,0 +1,30 @@
Code Generation Notes for MSA
=============================
Intrinsics are lowered to SelectionDAG nodes where possible in order to enable
optimisation, reduce the size of the ISel matcher, and reduce repetition in
the implementation. In a small number of cases, this can cause different
(semantically equivalent) instructions to be used in place of the requested
instruction, even when no optimisation has taken place.
Instructions
============
This section describes any quirks of instruction selection for MSA. For
example, two instructions might be equally valid for some given IR and one is
chosen in preference to the other.
vshf.w:
It is not possible to emit vshf.w when the shuffle description is
constant since shf.w covers exactly the same cases. shf.w is used
instead. It is also impossible for the shuffle description to be
unknown at compile-time due to the definition of shufflevector in
LLVM IR.
ilvl.d, pckev.d:
It is not possible to emit ilvl.d, or pckev.d since ilvev.d covers the
same shuffle. ilvev.d will be emitted instead.
ilvr.d, ilvod.d, pckod.d:
It is not possible to emit ilvr.d, or pckod.d since ilvod.d covers the
same shuffle. ilvod.d will be emitted instead.