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mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-20 03:23:01 +02:00

Revert r344873 "foo"

Rebase gone wrong left this in my tree.

llvm-svn: 344875
This commit is contained in:
Craig Topper 2018-10-21 21:08:37 +00:00
parent 469f8dae45
commit 671b85eab5
4 changed files with 45 additions and 62 deletions

View File

@ -6046,7 +6046,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
break; break;
} }
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodeVPERMILPMask(C, MaskEltSize, VT.getSizeInBits(), Mask); DecodeVPERMILPMask(C, MaskEltSize, Mask);
break; break;
} }
return false; return false;
@ -6063,7 +6063,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
break; break;
} }
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodePSHUFBMask(C, VT.getSizeInBits(), Mask); DecodePSHUFBMask(C, Mask);
break; break;
} }
return false; return false;
@ -6128,7 +6128,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
break; break;
} }
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodeVPERMIL2PMask(C, CtrlImm, MaskEltSize, VT.getSizeInBits(), Mask); DecodeVPERMIL2PMask(C, CtrlImm, MaskEltSize, Mask);
break; break;
} }
} }
@ -6145,7 +6145,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
break; break;
} }
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodeVPPERMMask(C, VT.getSizeInBits(), Mask); DecodeVPPERMMask(C, Mask);
break; break;
} }
return false; return false;
@ -6163,7 +6163,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
break; break;
} }
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodeVPERMVMask(C, MaskEltSize, VT.getSizeInBits(), Mask); DecodeVPERMVMask(C, MaskEltSize, Mask);
break; break;
} }
return false; return false;
@ -6178,7 +6178,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
SDValue MaskNode = N->getOperand(1); SDValue MaskNode = N->getOperand(1);
unsigned MaskEltSize = VT.getScalarSizeInBits(); unsigned MaskEltSize = VT.getScalarSizeInBits();
if (auto *C = getTargetConstantFromNode(MaskNode)) { if (auto *C = getTargetConstantFromNode(MaskNode)) {
DecodeVPERMV3Mask(C, MaskEltSize, VT.getSizeInBits(), Mask); DecodeVPERMV3Mask(C, MaskEltSize, Mask);
break; break;
} }
return false; return false;

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@ -1594,18 +1594,6 @@ void X86AsmPrinter::EmitSEHInstruction(const MachineInstr *MI) {
} }
} }
static unsigned getRegisterWidth(const MCOperandInfo &Info) {
if (Info.RegClass == X86::VR128RegClassID ||
Info.RegClass == X86::VR128XRegClassID)
return 128;
if (Info.RegClass == X86::VR256RegClassID ||
Info.RegClass == X86::VR256XRegClassID)
return 256;
if (Info.RegClass == X86::VR512RegClassID)
return 512;
llvm_unreachable("Unknown register class!");
}
void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) { void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
X86MCInstLower MCInstLowering(*MF, *this); X86MCInstLower MCInstLowering(*MF, *this);
const X86RegisterInfo *RI = const X86RegisterInfo *RI =
@ -1891,9 +1879,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MaskOp = MI->getOperand(MaskIdx); const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
if (auto *C = getConstantFromPool(*MI, MaskOp)) { if (auto *C = getConstantFromPool(*MI, MaskOp)) {
unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
SmallVector<int, 64> Mask; SmallVector<int, 64> Mask;
DecodePSHUFBMask(C, Width, Mask); DecodePSHUFBMask(C, Mask);
if (!Mask.empty()) if (!Mask.empty())
OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask), OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
!EnablePrintSchedInfo); !EnablePrintSchedInfo);
@ -1964,9 +1951,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MaskOp = MI->getOperand(MaskIdx); const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
if (auto *C = getConstantFromPool(*MI, MaskOp)) { if (auto *C = getConstantFromPool(*MI, MaskOp)) {
unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
SmallVector<int, 16> Mask; SmallVector<int, 16> Mask;
DecodeVPERMILPMask(C, ElSize, Width, Mask); DecodeVPERMILPMask(C, ElSize, Mask);
if (!Mask.empty()) if (!Mask.empty())
OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask), OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
!EnablePrintSchedInfo); !EnablePrintSchedInfo);
@ -1996,9 +1982,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MaskOp = MI->getOperand(6); const MachineOperand &MaskOp = MI->getOperand(6);
if (auto *C = getConstantFromPool(*MI, MaskOp)) { if (auto *C = getConstantFromPool(*MI, MaskOp)) {
unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
SmallVector<int, 16> Mask; SmallVector<int, 16> Mask;
DecodeVPERMIL2PMask(C, (unsigned)CtrlOp.getImm(), ElSize, Width, Mask); DecodeVPERMIL2PMask(C, (unsigned)CtrlOp.getImm(), ElSize, Mask);
if (!Mask.empty()) if (!Mask.empty())
OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask), OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
!EnablePrintSchedInfo); !EnablePrintSchedInfo);
@ -2014,9 +1999,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
const MachineOperand &MaskOp = MI->getOperand(6); const MachineOperand &MaskOp = MI->getOperand(6);
if (auto *C = getConstantFromPool(*MI, MaskOp)) { if (auto *C = getConstantFromPool(*MI, MaskOp)) {
unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
SmallVector<int, 16> Mask; SmallVector<int, 16> Mask;
DecodeVPPERMMask(C, Width, Mask); DecodeVPPERMMask(C, Mask);
if (!Mask.empty()) if (!Mask.empty())
OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask), OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
!EnablePrintSchedInfo); !EnablePrintSchedInfo);

View File

@ -112,10 +112,11 @@ static bool extractConstantMask(const Constant *C, unsigned MaskEltSizeInBits,
return true; return true;
} }
void DecodePSHUFBMask(const Constant *C, unsigned Width, void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
SmallVectorImpl<int> &ShuffleMask) { Type *MaskTy = C->getType();
assert((Width == 128 || Width == 256 || Width == 512) && unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
C->getType()->getPrimitiveSizeInBits() >= Width && (void)MaskTySize;
assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
"Unexpected vector size."); "Unexpected vector size.");
// The shuffle mask requires a byte vector. // The shuffle mask requires a byte vector.
@ -124,7 +125,7 @@ void DecodePSHUFBMask(const Constant *C, unsigned Width,
if (!extractConstantMask(C, 8, UndefElts, RawMask)) if (!extractConstantMask(C, 8, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / 8; unsigned NumElts = RawMask.size();
assert((NumElts == 16 || NumElts == 32 || NumElts == 64) && assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
"Unexpected number of vector elements."); "Unexpected number of vector elements.");
@ -150,10 +151,12 @@ void DecodePSHUFBMask(const Constant *C, unsigned Width,
} }
} }
void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
assert((Width == 128 || Width == 256 || Width == 512) && Type *MaskTy = C->getType();
C->getType()->getPrimitiveSizeInBits() >= Width && unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
(void)MaskTySize;
assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
"Unexpected vector size."); "Unexpected vector size.");
assert((ElSize == 32 || ElSize == 64) && "Unexpected vector element size."); assert((ElSize == 32 || ElSize == 64) && "Unexpected vector element size.");
@ -163,7 +166,7 @@ void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
if (!extractConstantMask(C, ElSize, UndefElts, RawMask)) if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / ElSize; unsigned NumElts = RawMask.size();
unsigned NumEltsPerLane = 128 / ElSize; unsigned NumEltsPerLane = 128 / ElSize;
assert((NumElts == 2 || NumElts == 4 || NumElts == 8 || NumElts == 16) && assert((NumElts == 2 || NumElts == 4 || NumElts == 8 || NumElts == 16) &&
"Unexpected number of vector elements."); "Unexpected number of vector elements.");
@ -186,13 +189,11 @@ void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
} }
void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize, void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
unsigned Width,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
Type *MaskTy = C->getType(); Type *MaskTy = C->getType();
unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits(); unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
(void)MaskTySize; (void)MaskTySize;
assert((MaskTySize == 128 || MaskTySize == 256) && assert((MaskTySize == 128 || MaskTySize == 256) && "Unexpected vector size.");
Width >= MaskTySize && "Unexpected vector size.");
// The shuffle mask requires elements the same size as the target. // The shuffle mask requires elements the same size as the target.
APInt UndefElts; APInt UndefElts;
@ -200,7 +201,7 @@ void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
if (!extractConstantMask(C, ElSize, UndefElts, RawMask)) if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / ElSize; unsigned NumElts = RawMask.size();
unsigned NumEltsPerLane = 128 / ElSize; unsigned NumEltsPerLane = 128 / ElSize;
assert((NumElts == 2 || NumElts == 4 || NumElts == 8) && assert((NumElts == 2 || NumElts == 4 || NumElts == 8) &&
"Unexpected number of vector elements."); "Unexpected number of vector elements.");
@ -241,12 +242,9 @@ void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
} }
} }
void DecodeVPPERMMask(const Constant *C, unsigned Width, void DecodeVPPERMMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
SmallVectorImpl<int> &ShuffleMask) { assert(C->getType()->getPrimitiveSizeInBits() == 128 &&
Type *MaskTy = C->getType(); "Unexpected vector size.");
unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
(void)MaskTySize;
assert(Width == 128 && Width >= MaskTySize && "Unexpected vector size.");
// The shuffle mask requires a byte vector. // The shuffle mask requires a byte vector.
APInt UndefElts; APInt UndefElts;
@ -254,7 +252,7 @@ void DecodeVPPERMMask(const Constant *C, unsigned Width,
if (!extractConstantMask(C, 8, UndefElts, RawMask)) if (!extractConstantMask(C, 8, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / 8; unsigned NumElts = RawMask.size();
assert(NumElts == 16 && "Unexpected number of vector elements."); assert(NumElts == 16 && "Unexpected number of vector elements.");
for (unsigned i = 0; i != NumElts; ++i) { for (unsigned i = 0; i != NumElts; ++i) {
@ -293,10 +291,12 @@ void DecodeVPPERMMask(const Constant *C, unsigned Width,
} }
} }
void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMVMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
assert((Width == 128 || Width == 256 || Width == 512) && Type *MaskTy = C->getType();
C->getType()->getPrimitiveSizeInBits() >= Width && unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
(void)MaskTySize;
assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
"Unexpected vector size."); "Unexpected vector size.");
assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) && assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
"Unexpected vector element size."); "Unexpected vector element size.");
@ -307,7 +307,7 @@ void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
if (!extractConstantMask(C, ElSize, UndefElts, RawMask)) if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / ElSize; unsigned NumElts = RawMask.size();
for (unsigned i = 0; i != NumElts; ++i) { for (unsigned i = 0; i != NumElts; ++i) {
if (UndefElts[i]) { if (UndefElts[i]) {
@ -319,10 +319,12 @@ void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
} }
} }
void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask) { SmallVectorImpl<int> &ShuffleMask) {
assert((Width == 128 || Width == 256 || Width == 512) && Type *MaskTy = C->getType();
C->getType()->getPrimitiveSizeInBits() >= Width && unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
(void)MaskTySize;
assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
"Unexpected vector size."); "Unexpected vector size.");
assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) && assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
"Unexpected vector element size."); "Unexpected vector element size.");
@ -333,7 +335,7 @@ void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width,
if (!extractConstantMask(C, ElSize, UndefElts, RawMask)) if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
return; return;
unsigned NumElts = Width / ElSize; unsigned NumElts = RawMask.size();
for (unsigned i = 0; i != NumElts; ++i) { for (unsigned i = 0; i != NumElts; ++i) {
if (UndefElts[i]) { if (UndefElts[i]) {

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@ -26,28 +26,25 @@ class Constant;
class MVT; class MVT;
/// Decode a PSHUFB mask from an IR-level vector constant. /// Decode a PSHUFB mask from an IR-level vector constant.
void DecodePSHUFBMask(const Constant *C, unsigned Width, void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
SmallVectorImpl<int> &ShuffleMask);
/// Decode a VPERMILP variable mask from an IR-level vector constant. /// Decode a VPERMILP variable mask from an IR-level vector constant.
void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// Decode a VPERMILP2 variable mask from an IR-level vector constant. /// Decode a VPERMILP2 variable mask from an IR-level vector constant.
void DecodeVPERMIL2PMask(const Constant *C, unsigned MatchImm, unsigned ElSize, void DecodeVPERMIL2PMask(const Constant *C, unsigned MatchImm, unsigned ElSize,
unsigned Width,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// Decode a VPPERM variable mask from an IR-level vector constant. /// Decode a VPPERM variable mask from an IR-level vector constant.
void DecodeVPPERMMask(const Constant *C, unsigned Width, void DecodeVPPERMMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
SmallVectorImpl<int> &ShuffleMask);
/// Decode a VPERM W/D/Q/PS/PD mask from an IR-level vector constant. /// Decode a VPERM W/D/Q/PS/PD mask from an IR-level vector constant.
void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMVMask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
/// Decode a VPERMT2 W/D/Q/PS/PD mask from an IR-level vector constant. /// Decode a VPERMT2 W/D/Q/PS/PD mask from an IR-level vector constant.
void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width, void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize,
SmallVectorImpl<int> &ShuffleMask); SmallVectorImpl<int> &ShuffleMask);
} // llvm namespace } // llvm namespace