mirror of
https://github.com/RPCS3/llvm-mirror.git
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Revert r344873 "foo"
Rebase gone wrong left this in my tree. llvm-svn: 344875
This commit is contained in:
parent
469f8dae45
commit
671b85eab5
@ -6046,7 +6046,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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break;
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break;
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}
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}
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodeVPERMILPMask(C, MaskEltSize, VT.getSizeInBits(), Mask);
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DecodeVPERMILPMask(C, MaskEltSize, Mask);
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break;
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break;
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}
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}
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return false;
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return false;
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@ -6063,7 +6063,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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break;
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break;
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}
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}
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodePSHUFBMask(C, VT.getSizeInBits(), Mask);
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DecodePSHUFBMask(C, Mask);
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break;
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break;
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}
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}
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return false;
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return false;
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@ -6128,7 +6128,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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break;
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break;
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}
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}
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodeVPERMIL2PMask(C, CtrlImm, MaskEltSize, VT.getSizeInBits(), Mask);
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DecodeVPERMIL2PMask(C, CtrlImm, MaskEltSize, Mask);
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break;
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break;
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}
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}
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}
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}
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@ -6145,7 +6145,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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break;
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break;
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}
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}
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodeVPPERMMask(C, VT.getSizeInBits(), Mask);
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DecodeVPPERMMask(C, Mask);
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break;
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break;
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}
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}
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return false;
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return false;
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@ -6163,7 +6163,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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break;
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break;
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}
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}
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodeVPERMVMask(C, MaskEltSize, VT.getSizeInBits(), Mask);
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DecodeVPERMVMask(C, MaskEltSize, Mask);
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break;
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break;
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}
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}
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return false;
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return false;
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@ -6178,7 +6178,7 @@ static bool getTargetShuffleMask(SDNode *N, MVT VT, bool AllowSentinelZero,
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SDValue MaskNode = N->getOperand(1);
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SDValue MaskNode = N->getOperand(1);
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unsigned MaskEltSize = VT.getScalarSizeInBits();
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unsigned MaskEltSize = VT.getScalarSizeInBits();
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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if (auto *C = getTargetConstantFromNode(MaskNode)) {
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DecodeVPERMV3Mask(C, MaskEltSize, VT.getSizeInBits(), Mask);
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DecodeVPERMV3Mask(C, MaskEltSize, Mask);
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break;
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break;
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}
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}
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return false;
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return false;
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@ -1594,18 +1594,6 @@ void X86AsmPrinter::EmitSEHInstruction(const MachineInstr *MI) {
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}
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}
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}
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}
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static unsigned getRegisterWidth(const MCOperandInfo &Info) {
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if (Info.RegClass == X86::VR128RegClassID ||
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Info.RegClass == X86::VR128XRegClassID)
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return 128;
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if (Info.RegClass == X86::VR256RegClassID ||
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Info.RegClass == X86::VR256XRegClassID)
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return 256;
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if (Info.RegClass == X86::VR512RegClassID)
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return 512;
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llvm_unreachable("Unknown register class!");
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}
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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X86MCInstLower MCInstLowering(*MF, *this);
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X86MCInstLower MCInstLowering(*MF, *this);
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const X86RegisterInfo *RI =
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const X86RegisterInfo *RI =
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@ -1891,9 +1879,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
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const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
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SmallVector<int, 64> Mask;
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SmallVector<int, 64> Mask;
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DecodePSHUFBMask(C, Width, Mask);
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DecodePSHUFBMask(C, Mask);
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if (!Mask.empty())
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if (!Mask.empty())
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OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
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OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
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!EnablePrintSchedInfo);
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!EnablePrintSchedInfo);
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@ -1964,9 +1951,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
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const MachineOperand &MaskOp = MI->getOperand(MaskIdx);
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
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SmallVector<int, 16> Mask;
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SmallVector<int, 16> Mask;
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DecodeVPERMILPMask(C, ElSize, Width, Mask);
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DecodeVPERMILPMask(C, ElSize, Mask);
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if (!Mask.empty())
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if (!Mask.empty())
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OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
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OutStreamer->AddComment(getShuffleComment(MI, SrcIdx, SrcIdx, Mask),
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!EnablePrintSchedInfo);
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!EnablePrintSchedInfo);
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@ -1996,9 +1982,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MaskOp = MI->getOperand(6);
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const MachineOperand &MaskOp = MI->getOperand(6);
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
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SmallVector<int, 16> Mask;
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SmallVector<int, 16> Mask;
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DecodeVPERMIL2PMask(C, (unsigned)CtrlOp.getImm(), ElSize, Width, Mask);
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DecodeVPERMIL2PMask(C, (unsigned)CtrlOp.getImm(), ElSize, Mask);
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if (!Mask.empty())
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if (!Mask.empty())
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OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
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OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
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!EnablePrintSchedInfo);
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!EnablePrintSchedInfo);
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@ -2014,9 +1999,8 @@ void X86AsmPrinter::EmitInstruction(const MachineInstr *MI) {
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const MachineOperand &MaskOp = MI->getOperand(6);
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const MachineOperand &MaskOp = MI->getOperand(6);
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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if (auto *C = getConstantFromPool(*MI, MaskOp)) {
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unsigned Width = getRegisterWidth(MI->getDesc().OpInfo[0]);
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SmallVector<int, 16> Mask;
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SmallVector<int, 16> Mask;
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DecodeVPPERMMask(C, Width, Mask);
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DecodeVPPERMMask(C, Mask);
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if (!Mask.empty())
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if (!Mask.empty())
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OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
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OutStreamer->AddComment(getShuffleComment(MI, 1, 2, Mask),
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!EnablePrintSchedInfo);
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!EnablePrintSchedInfo);
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@ -112,10 +112,11 @@ static bool extractConstantMask(const Constant *C, unsigned MaskEltSizeInBits,
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return true;
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return true;
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}
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}
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void DecodePSHUFBMask(const Constant *C, unsigned Width,
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void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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Type *MaskTy = C->getType();
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assert((Width == 128 || Width == 256 || Width == 512) &&
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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C->getType()->getPrimitiveSizeInBits() >= Width &&
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(void)MaskTySize;
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assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
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"Unexpected vector size.");
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"Unexpected vector size.");
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// The shuffle mask requires a byte vector.
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// The shuffle mask requires a byte vector.
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@ -124,7 +125,7 @@ void DecodePSHUFBMask(const Constant *C, unsigned Width,
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if (!extractConstantMask(C, 8, UndefElts, RawMask))
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if (!extractConstantMask(C, 8, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / 8;
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unsigned NumElts = RawMask.size();
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assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
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assert((NumElts == 16 || NumElts == 32 || NumElts == 64) &&
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"Unexpected number of vector elements.");
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"Unexpected number of vector elements.");
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@ -150,10 +151,12 @@ void DecodePSHUFBMask(const Constant *C, unsigned Width,
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}
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}
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}
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}
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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assert((Width == 128 || Width == 256 || Width == 512) &&
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Type *MaskTy = C->getType();
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C->getType()->getPrimitiveSizeInBits() >= Width &&
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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(void)MaskTySize;
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assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
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"Unexpected vector size.");
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"Unexpected vector size.");
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assert((ElSize == 32 || ElSize == 64) && "Unexpected vector element size.");
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assert((ElSize == 32 || ElSize == 64) && "Unexpected vector element size.");
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@ -163,7 +166,7 @@ void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / ElSize;
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unsigned NumElts = RawMask.size();
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unsigned NumEltsPerLane = 128 / ElSize;
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unsigned NumEltsPerLane = 128 / ElSize;
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assert((NumElts == 2 || NumElts == 4 || NumElts == 8 || NumElts == 16) &&
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assert((NumElts == 2 || NumElts == 4 || NumElts == 8 || NumElts == 16) &&
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"Unexpected number of vector elements.");
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"Unexpected number of vector elements.");
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@ -186,13 +189,11 @@ void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
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}
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}
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void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
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void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
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unsigned Width,
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SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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Type *MaskTy = C->getType();
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Type *MaskTy = C->getType();
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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(void)MaskTySize;
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(void)MaskTySize;
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assert((MaskTySize == 128 || MaskTySize == 256) &&
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assert((MaskTySize == 128 || MaskTySize == 256) && "Unexpected vector size.");
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Width >= MaskTySize && "Unexpected vector size.");
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// The shuffle mask requires elements the same size as the target.
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// The shuffle mask requires elements the same size as the target.
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APInt UndefElts;
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APInt UndefElts;
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@ -200,7 +201,7 @@ void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / ElSize;
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unsigned NumElts = RawMask.size();
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unsigned NumEltsPerLane = 128 / ElSize;
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unsigned NumEltsPerLane = 128 / ElSize;
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assert((NumElts == 2 || NumElts == 4 || NumElts == 8) &&
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assert((NumElts == 2 || NumElts == 4 || NumElts == 8) &&
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"Unexpected number of vector elements.");
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"Unexpected number of vector elements.");
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@ -241,12 +242,9 @@ void DecodeVPERMIL2PMask(const Constant *C, unsigned M2Z, unsigned ElSize,
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}
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}
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}
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}
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void DecodeVPPERMMask(const Constant *C, unsigned Width,
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void DecodeVPPERMMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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assert(C->getType()->getPrimitiveSizeInBits() == 128 &&
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Type *MaskTy = C->getType();
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"Unexpected vector size.");
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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(void)MaskTySize;
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assert(Width == 128 && Width >= MaskTySize && "Unexpected vector size.");
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// The shuffle mask requires a byte vector.
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// The shuffle mask requires a byte vector.
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APInt UndefElts;
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APInt UndefElts;
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@ -254,7 +252,7 @@ void DecodeVPPERMMask(const Constant *C, unsigned Width,
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if (!extractConstantMask(C, 8, UndefElts, RawMask))
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if (!extractConstantMask(C, 8, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / 8;
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unsigned NumElts = RawMask.size();
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assert(NumElts == 16 && "Unexpected number of vector elements.");
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assert(NumElts == 16 && "Unexpected number of vector elements.");
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for (unsigned i = 0; i != NumElts; ++i) {
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for (unsigned i = 0; i != NumElts; ++i) {
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@ -293,10 +291,12 @@ void DecodeVPPERMMask(const Constant *C, unsigned Width,
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}
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}
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}
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}
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void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
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void DecodeVPERMVMask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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assert((Width == 128 || Width == 256 || Width == 512) &&
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Type *MaskTy = C->getType();
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C->getType()->getPrimitiveSizeInBits() >= Width &&
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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(void)MaskTySize;
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assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
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"Unexpected vector size.");
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"Unexpected vector size.");
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assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
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assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
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"Unexpected vector element size.");
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"Unexpected vector element size.");
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@ -307,7 +307,7 @@ void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / ElSize;
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unsigned NumElts = RawMask.size();
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for (unsigned i = 0; i != NumElts; ++i) {
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for (unsigned i = 0; i != NumElts; ++i) {
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if (UndefElts[i]) {
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if (UndefElts[i]) {
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@ -319,10 +319,12 @@ void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
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}
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}
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}
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}
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void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width,
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void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask) {
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SmallVectorImpl<int> &ShuffleMask) {
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assert((Width == 128 || Width == 256 || Width == 512) &&
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Type *MaskTy = C->getType();
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C->getType()->getPrimitiveSizeInBits() >= Width &&
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unsigned MaskTySize = MaskTy->getPrimitiveSizeInBits();
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(void)MaskTySize;
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assert((MaskTySize == 128 || MaskTySize == 256 || MaskTySize == 512) &&
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"Unexpected vector size.");
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"Unexpected vector size.");
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assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
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assert((ElSize == 8 || ElSize == 16 || ElSize == 32 || ElSize == 64) &&
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"Unexpected vector element size.");
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"Unexpected vector element size.");
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@ -333,7 +335,7 @@ void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width,
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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if (!extractConstantMask(C, ElSize, UndefElts, RawMask))
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return;
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return;
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unsigned NumElts = Width / ElSize;
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unsigned NumElts = RawMask.size();
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for (unsigned i = 0; i != NumElts; ++i) {
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for (unsigned i = 0; i != NumElts; ++i) {
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if (UndefElts[i]) {
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if (UndefElts[i]) {
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@ -26,28 +26,25 @@ class Constant;
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class MVT;
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class MVT;
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/// Decode a PSHUFB mask from an IR-level vector constant.
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/// Decode a PSHUFB mask from an IR-level vector constant.
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void DecodePSHUFBMask(const Constant *C, unsigned Width,
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void DecodePSHUFBMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
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SmallVectorImpl<int> &ShuffleMask);
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/// Decode a VPERMILP variable mask from an IR-level vector constant.
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/// Decode a VPERMILP variable mask from an IR-level vector constant.
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize, unsigned Width,
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void DecodeVPERMILPMask(const Constant *C, unsigned ElSize,
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SmallVectorImpl<int> &ShuffleMask);
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SmallVectorImpl<int> &ShuffleMask);
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/// Decode a VPERMILP2 variable mask from an IR-level vector constant.
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/// Decode a VPERMILP2 variable mask from an IR-level vector constant.
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void DecodeVPERMIL2PMask(const Constant *C, unsigned MatchImm, unsigned ElSize,
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void DecodeVPERMIL2PMask(const Constant *C, unsigned MatchImm, unsigned ElSize,
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unsigned Width,
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SmallVectorImpl<int> &ShuffleMask);
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SmallVectorImpl<int> &ShuffleMask);
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/// Decode a VPPERM variable mask from an IR-level vector constant.
|
/// Decode a VPPERM variable mask from an IR-level vector constant.
|
||||||
void DecodeVPPERMMask(const Constant *C, unsigned Width,
|
void DecodeVPPERMMask(const Constant *C, SmallVectorImpl<int> &ShuffleMask);
|
||||||
SmallVectorImpl<int> &ShuffleMask);
|
|
||||||
|
|
||||||
/// Decode a VPERM W/D/Q/PS/PD mask from an IR-level vector constant.
|
/// Decode a VPERM W/D/Q/PS/PD mask from an IR-level vector constant.
|
||||||
void DecodeVPERMVMask(const Constant *C, unsigned ElSize, unsigned Width,
|
void DecodeVPERMVMask(const Constant *C, unsigned ElSize,
|
||||||
SmallVectorImpl<int> &ShuffleMask);
|
SmallVectorImpl<int> &ShuffleMask);
|
||||||
|
|
||||||
/// Decode a VPERMT2 W/D/Q/PS/PD mask from an IR-level vector constant.
|
/// Decode a VPERMT2 W/D/Q/PS/PD mask from an IR-level vector constant.
|
||||||
void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize, unsigned Width,
|
void DecodeVPERMV3Mask(const Constant *C, unsigned ElSize,
|
||||||
SmallVectorImpl<int> &ShuffleMask);
|
SmallVectorImpl<int> &ShuffleMask);
|
||||||
|
|
||||||
} // llvm namespace
|
} // llvm namespace
|
||||||
|
Loading…
Reference in New Issue
Block a user