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[CostModel][X86] Fixed AVX1/AVX512 sdiv/udiv uniformconst costs for 256/512 bit integer vectors
We weren't checking for uniform const costs before the general cost, resulting in very high estimates. llvm-svn: 284755
This commit is contained in:
Simon Pilgrim
parent
4cd983fcee
commit
6773ac2510
@ -140,6 +140,30 @@ int X86TTIImpl::getArithmeticInstrCost(
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return Cost;
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}
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static const CostTblEntry AVX512BWUniformConstCostTable[] = {
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{ ISD::SDIV, MVT::v32i16, 6 }, // vpmulhw sequence
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{ ISD::UDIV, MVT::v32i16, 6 }, // vpmulhuw sequence
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};
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if (Op2Info == TargetTransformInfo::OK_UniformConstantValue &&
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ST->hasBWI()) {
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if (const auto *Entry = CostTableLookup(AVX512BWUniformConstCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVX512UniformConstCostTable[] = {
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{ ISD::SDIV, MVT::v16i32, 15 }, // vpmuldq sequence
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{ ISD::UDIV, MVT::v16i32, 15 }, // vpmuludq sequence
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};
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if (Op2Info == TargetTransformInfo::OK_UniformConstantValue &&
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ST->hasAVX512()) {
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if (const auto *Entry = CostTableLookup(AVX512UniformConstCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVX2UniformConstCostTable[] = {
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{ ISD::SRA, MVT::v4i64, 4 }, // 2 x psrad + shuffle.
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@ -156,6 +180,30 @@ int X86TTIImpl::getArithmeticInstrCost(
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry SSE2UniformConstCostTable[] = {
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{ ISD::SDIV, MVT::v16i16, 12 }, // pmulhw sequence
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{ ISD::SDIV, MVT::v8i16, 6 }, // pmulhw sequence
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{ ISD::UDIV, MVT::v16i16, 12 }, // pmulhuw sequence
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{ ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence
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{ ISD::SDIV, MVT::v8i32, 38 }, // pmuludq sequence
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{ ISD::SDIV, MVT::v4i32, 19 }, // pmuludq sequence
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{ ISD::UDIV, MVT::v8i32, 30 }, // pmuludq sequence
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{ ISD::UDIV, MVT::v4i32, 15 }, // pmuludq sequence
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};
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if (Op2Info == TargetTransformInfo::OK_UniformConstantValue &&
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ST->hasSSE2()) {
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// pmuldq sequence.
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if (ISD == ISD::SDIV && LT.second == MVT::v8i32 && ST->hasAVX())
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return LT.first * 30;
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if (ISD == ISD::SDIV && LT.second == MVT::v4i32 && ST->hasSSE41())
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return LT.first * 15;
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if (const auto *Entry = CostTableLookup(SSE2UniformConstCostTable, ISD,
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LT.second))
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry AVX512BWCostTable[] = {
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// Vectorizing division is a bad idea. See the SSE2 table for more comments.
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{ ISD::SDIV, MVT::v64i8, 64*20 },
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@ -291,15 +339,6 @@ int X86TTIImpl::getArithmeticInstrCost(
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return LT.first * Entry->Cost;
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}
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static const CostTblEntry
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SSE2UniformConstCostTable[] = {
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// Constant splats are cheaper for the following instructions.
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{ ISD::SDIV, MVT::v8i16, 6 }, // pmulhw sequence
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{ ISD::UDIV, MVT::v8i16, 6 }, // pmulhuw sequence
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{ ISD::SDIV, MVT::v4i32, 19 }, // pmuludq sequence
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{ ISD::UDIV, MVT::v4i32, 15 }, // pmuludq sequence
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};
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static const CostTblEntry
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SSE2UniformCostTable[] = {
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// Uniform splats are cheaper for the following instructions.
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@ -334,14 +373,6 @@ int X86TTIImpl::getArithmeticInstrCost(
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if (ST->hasSSE2() &&
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((Op2Info == TargetTransformInfo::OK_UniformConstantValue) ||
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(Op2Info == TargetTransformInfo::OK_UniformValue))) {
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if (Op2Info == TargetTransformInfo::OK_UniformConstantValue) {
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// pmuldq sequence.
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if (ISD == ISD::SDIV && LT.second == MVT::v4i32 && ST->hasSSE41())
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return LT.first * 15;
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if (const auto *Entry =
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CostTableLookup(SSE2UniformConstCostTable, ISD, LT.second))
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return LT.first * Entry->Cost;
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}
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if (const auto *Entry =
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CostTableLookup(SSE2UniformCostTable, ISD, LT.second))
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return LT.first * Entry->Cost;
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@ -113,8 +113,8 @@ define i32 @udiv() {
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%V64i8 = udiv <64 x i8> undef, undef
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ret i32 undef
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}
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}
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; CHECK-LABEL: 'sdiv_uniformconst'
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define i32 @sdiv_uniformconst() {
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; CHECK: cost of 1 {{.*}} %I64 = sdiv
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@ -139,17 +139,16 @@ define i32 @sdiv_uniformconst() {
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; SSE2: cost of 38 {{.*}} %V8i32 = sdiv
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; SSSE3: cost of 38 {{.*}} %V8i32 = sdiv
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; SSE42: cost of 30 {{.*}} %V8i32 = sdiv
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; AVX1: cost of 160 {{.*}} %V8i32 = sdiv
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; AVX1: cost of 30 {{.*}} %V8i32 = sdiv
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; AVX2: cost of 15 {{.*}} %V8i32 = sdiv
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; AVX512: cost of 15 {{.*}} %V8i32 = sdiv
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%V8i32 = sdiv <8 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; SSE2: cost of 76 {{.*}} %V16i32 = sdiv
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; SSSE3: cost of 76 {{.*}} %V16i32 = sdiv
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; SSE42: cost of 60 {{.*}} %V16i32 = sdiv
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; AVX1: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX1: cost of 60 {{.*}} %V16i32 = sdiv
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; AVX2: cost of 30 {{.*}} %V16i32 = sdiv
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; AVX512F: cost of 48 {{.*}} %V16i32 = sdiv
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; AVX512BW: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX512: cost of 15 {{.*}} %V16i32 = sdiv
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%V16i32 = sdiv <16 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; CHECK: cost of 1 {{.*}} %I16 = sdiv
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@ -158,15 +157,15 @@ define i32 @sdiv_uniformconst() {
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; AVX: cost of 6 {{.*}} %V8i16 = sdiv
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%V8i16 = sdiv <8 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; SSE: cost of 12 {{.*}} %V16i16 = sdiv
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; AVX1: cost of 320 {{.*}} %V16i16 = sdiv
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; AVX1: cost of 12 {{.*}} %V16i16 = sdiv
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; AVX2: cost of 6 {{.*}} %V16i16 = sdiv
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; AVX512: cost of 6 {{.*}} %V16i16 = sdiv
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%V16i16 = sdiv <16 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; SSE: cost of 24 {{.*}} %V32i16 = sdiv
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; AVX1: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX1: cost of 24 {{.*}} %V32i16 = sdiv
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; AVX2: cost of 12 {{.*}} %V32i16 = sdiv
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; AVX512F: cost of 12 {{.*}} %V32i16 = sdiv
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; AVX512BW: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX512BW: cost of 6 {{.*}} %V32i16 = sdiv
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%V32i16 = sdiv <32 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; CHECK: cost of 1 {{.*}} %I8 = sdiv
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@ -182,8 +181,8 @@ define i32 @sdiv_uniformconst() {
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%V64i8 = sdiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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ret i32 undef
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}
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}
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; CHECK-LABEL: 'udiv_uniformconst'
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define i32 @udiv_uniformconst() {
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; CHECK: cost of 1 {{.*}} %I64 = udiv
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@ -204,15 +203,14 @@ define i32 @udiv_uniformconst() {
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; AVX: cost of 15 {{.*}} %V4i32 = udiv
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%V4i32 = udiv <4 x i32> undef, <i32 7, i32 7, i32 7, i32 7>
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; SSE: cost of 30 {{.*}} %V8i32 = udiv
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; AVX1: cost of 160 {{.*}} %V8i32 = udiv
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; AVX1: cost of 30 {{.*}} %V8i32 = udiv
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; AVX2: cost of 15 {{.*}} %V8i32 = udiv
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; AVX512: cost of 15 {{.*}} %V8i32 = udiv
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%V8i32 = udiv <8 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; SSE: cost of 60 {{.*}} %V16i32 = udiv
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; AVX1: cost of 320 {{.*}} %V16i32 = udiv
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; AVX1: cost of 60 {{.*}} %V16i32 = udiv
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; AVX2: cost of 30 {{.*}} %V16i32 = udiv
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; AVX512F: cost of 48 {{.*}} %V16i32 = udiv
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; AVX512BW: cost of 320 {{.*}} %V16i32 = udiv
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; AVX512: cost of 15 {{.*}} %V16i32 = udiv
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%V16i32 = udiv <16 x i32> undef, <i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7, i32 7>
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; CHECK: cost of 1 {{.*}} %I16 = udiv
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@ -221,15 +219,15 @@ define i32 @udiv_uniformconst() {
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; AVX: cost of 6 {{.*}} %V8i16 = udiv
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%V8i16 = udiv <8 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; SSE: cost of 12 {{.*}} %V16i16 = udiv
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; AVX1: cost of 320 {{.*}} %V16i16 = udiv
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; AVX1: cost of 12 {{.*}} %V16i16 = udiv
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; AVX2: cost of 6 {{.*}} %V16i16 = udiv
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; AVX512: cost of 6 {{.*}} %V16i16 = udiv
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%V16i16 = udiv <16 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; SSE: cost of 24 {{.*}} %V32i16 = udiv
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; AVX1: cost of 640 {{.*}} %V32i16 = udiv
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; AVX1: cost of 24 {{.*}} %V32i16 = udiv
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; AVX2: cost of 12 {{.*}} %V32i16 = udiv
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; AVX512F: cost of 12 {{.*}} %V32i16 = udiv
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; AVX512BW: cost of 640 {{.*}} %V32i16 = udiv
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; AVX512BW: cost of 6 {{.*}} %V32i16 = udiv
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%V32i16 = udiv <32 x i16> undef, <i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7, i16 7>
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; CHECK: cost of 1 {{.*}} %I8 = udiv
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@ -245,8 +243,8 @@ define i32 @udiv_uniformconst() {
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%V64i8 = udiv <64 x i8> undef, <i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7, i8 7>
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ret i32 undef
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}
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}
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; CHECK-LABEL: 'sdiv_uniformconstpow2'
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define i32 @sdiv_uniformconstpow2() {
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; CHECK: cost of 1 {{.*}} %I64 = sdiv
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@ -271,17 +269,16 @@ define i32 @sdiv_uniformconstpow2() {
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; SSE2: cost of 38 {{.*}} %V8i32 = sdiv
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; SSSE3: cost of 38 {{.*}} %V8i32 = sdiv
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; SSE42: cost of 30 {{.*}} %V8i32 = sdiv
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; AVX1: cost of 160 {{.*}} %V8i32 = sdiv
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; AVX1: cost of 30 {{.*}} %V8i32 = sdiv
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; AVX2: cost of 15 {{.*}} %V8i32 = sdiv
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; AVX512: cost of 15 {{.*}} %V8i32 = sdiv
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%V8i32 = sdiv <8 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
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; SSE2: cost of 76 {{.*}} %V16i32 = sdiv
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; SSSE3: cost of 76 {{.*}} %V16i32 = sdiv
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; SSE42: cost of 60 {{.*}} %V16i32 = sdiv
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; AVX1: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX1: cost of 60 {{.*}} %V16i32 = sdiv
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; AVX2: cost of 30 {{.*}} %V16i32 = sdiv
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; AVX512F: cost of 48 {{.*}} %V16i32 = sdiv
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; AVX512BW: cost of 320 {{.*}} %V16i32 = sdiv
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; AVX512: cost of 15 {{.*}} %V16i32 = sdiv
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%V16i32 = sdiv <16 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
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; CHECK: cost of 1 {{.*}} %I16 = sdiv
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@ -290,15 +287,15 @@ define i32 @sdiv_uniformconstpow2() {
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; AVX: cost of 6 {{.*}} %V8i16 = sdiv
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%V8i16 = sdiv <8 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
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; SSE: cost of 12 {{.*}} %V16i16 = sdiv
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; AVX1: cost of 320 {{.*}} %V16i16 = sdiv
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; AVX1: cost of 12 {{.*}} %V16i16 = sdiv
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; AVX2: cost of 6 {{.*}} %V16i16 = sdiv
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; AVX512: cost of 6 {{.*}} %V16i16 = sdiv
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%V16i16 = sdiv <16 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
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; SSE: cost of 24 {{.*}} %V32i16 = sdiv
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; AVX1: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX1: cost of 24 {{.*}} %V32i16 = sdiv
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; AVX2: cost of 12 {{.*}} %V32i16 = sdiv
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; AVX512F: cost of 12 {{.*}} %V32i16 = sdiv
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; AVX512BW: cost of 640 {{.*}} %V32i16 = sdiv
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; AVX512BW: cost of 6 {{.*}} %V32i16 = sdiv
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%V32i16 = sdiv <32 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
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; CHECK: cost of 1 {{.*}} %I8 = sdiv
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@ -315,7 +312,7 @@ define i32 @sdiv_uniformconstpow2() {
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ret i32 undef
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}
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; CHECK-LABEL: 'udiv_uniformconstpow2'
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define i32 @udiv_uniformconstpow2() {
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; CHECK: cost of 1 {{.*}} %I64 = udiv
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@ -336,15 +333,14 @@ define i32 @udiv_uniformconstpow2() {
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; AVX: cost of 15 {{.*}} %V4i32 = udiv
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%V4i32 = udiv <4 x i32> undef, <i32 16, i32 16, i32 16, i32 16>
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; SSE: cost of 30 {{.*}} %V8i32 = udiv
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; AVX1: cost of 160 {{.*}} %V8i32 = udiv
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; AVX1: cost of 30 {{.*}} %V8i32 = udiv
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; AVX2: cost of 15 {{.*}} %V8i32 = udiv
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; AVX512: cost of 15 {{.*}} %V8i32 = udiv
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%V8i32 = udiv <8 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
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; SSE: cost of 60 {{.*}} %V16i32 = udiv
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; AVX1: cost of 320 {{.*}} %V16i32 = udiv
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; AVX1: cost of 60 {{.*}} %V16i32 = udiv
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; AVX2: cost of 30 {{.*}} %V16i32 = udiv
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; AVX512F: cost of 48 {{.*}} %V16i32 = udiv
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; AVX512BW: cost of 320 {{.*}} %V16i32 = udiv
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; AVX512: cost of 15 {{.*}} %V16i32 = udiv
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%V16i32 = udiv <16 x i32> undef, <i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16, i32 16>
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; CHECK: cost of 1 {{.*}} %I16 = udiv
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@ -353,15 +349,15 @@ define i32 @udiv_uniformconstpow2() {
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; AVX: cost of 6 {{.*}} %V8i16 = udiv
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%V8i16 = udiv <8 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
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; SSE: cost of 12 {{.*}} %V16i16 = udiv
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; AVX1: cost of 320 {{.*}} %V16i16 = udiv
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; AVX1: cost of 12 {{.*}} %V16i16 = udiv
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||||
; AVX2: cost of 6 {{.*}} %V16i16 = udiv
|
||||
; AVX512: cost of 6 {{.*}} %V16i16 = udiv
|
||||
%V16i16 = udiv <16 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||
; SSE: cost of 24 {{.*}} %V32i16 = udiv
|
||||
; AVX1: cost of 640 {{.*}} %V32i16 = udiv
|
||||
; AVX1: cost of 24 {{.*}} %V32i16 = udiv
|
||||
; AVX2: cost of 12 {{.*}} %V32i16 = udiv
|
||||
; AVX512F: cost of 12 {{.*}} %V32i16 = udiv
|
||||
; AVX512BW: cost of 640 {{.*}} %V32i16 = udiv
|
||||
; AVX512BW: cost of 6 {{.*}} %V32i16 = udiv
|
||||
%V32i16 = udiv <32 x i16> undef, <i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16, i16 16>
|
||||
|
||||
; CHECK: cost of 1 {{.*}} %I8 = udiv
|
||||
@ -377,4 +373,4 @@ define i32 @udiv_uniformconstpow2() {
|
||||
%V64i8 = udiv <64 x i8> undef, <i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16, i8 16>
|
||||
|
||||
ret i32 undef
|
||||
}
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user