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R600/SI: Remove modifier operands from V_CNDMASK_B32_e64

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Modifiers don't work for this instruction.

llvm-svn: 218253
This commit is contained in:
Tom Stellard 2014-09-22 15:35:34 +00:00
parent 8c1a958993
commit 677e3ecc4c
2 changed files with 3 additions and 8 deletions
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5
lib/Target/R600/SIInstructions.td
View File

@ -1317,9 +1317,8 @@ def V_CNDMASK_B32_e32 : VOP2 <0x00000000, (outs VReg_32:$dst),
}
def V_CNDMASK_B32_e64 : VOP3 <0x00000100, (outs VReg_32:$dst),
(ins VSrc_32:$src0, VSrc_32:$src1, SSrc_64:$src2,
InstFlag:$abs, InstFlag:$clamp, InstFlag:$omod, InstFlag:$neg),
"V_CNDMASK_B32_e64 $dst, $src0, $src1, $src2, $abs, $clamp, $omod, $neg",
(ins VSrc_32:$src0, VSrc_32:$src1, SSrc_64:$src2),
"V_CNDMASK_B32_e64 $dst, $src0, $src1, $src2",
[(set i32:$dst, (select i1:$src2, i32:$src1, i32:$src0))]
> {
let src0_modifiers = 0;

6
lib/Target/R600/SILowerI1Copies.cpp
View File

@ -127,11 +127,7 @@ bool SILowerI1Copies::runOnMachineFunction(MachineFunction &MF) {
.addOperand(MI.getOperand(0))
.addImm(0)
.addImm(-1)
.addOperand(MI.getOperand(1))
.addImm(0)
.addImm(0)
.addImm(0)
.addImm(0);
.addOperand(MI.getOperand(1));
MI.eraseFromParent();
} else if (TRI->getCommonSubClass(DstRC, &AMDGPU::SGPR_64RegClass) &&
SrcRC == &AMDGPU::VReg_1RegClass) {