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[XRay][Arm32] Reduce the portion of the stub and implement more staging for tail calls - in LLVM

Summary:
This patch provides more staging for tail calls in XRay Arm32 . When the logging part of XRay is ready for tail calls, its support in the core part of XRay Arm32 may be as easy as changing the number passed to the handler from 1 to 2.
Coupled patch:
- https://reviews.llvm.org/D28674

Reviewers: dberris, rengolin

Reviewed By: dberris

Subscribers: llvm-commits, iid_iunknown, aemerson, rengolin, dberris

Differential Revision: https://reviews.llvm.org/D28673

llvm-svn: 293185
This commit is contained in:
Serge Rogatch 2017-01-26 16:17:03 +00:00
parent c7f26fe4ae
commit 67e972e487
2 changed files with 15 additions and 0 deletions

View File

@ -4696,6 +4696,19 @@ bool ARMBaseInstrInfo::hasNOP() const {
return Subtarget.getFeatureBits()[ARM::HasV6KOps];
}
bool ARMBaseInstrInfo::isTailCall(const MachineInstr &Inst) const
{
switch (Inst.getOpcode()) {
case ARM::TAILJMPd:
case ARM::TAILJMPr:
case ARM::TCRETURNdi:
case ARM::TCRETURNri:
return true;
default:
return false;
}
}
bool ARMBaseInstrInfo::isSwiftFastImmShift(const MachineInstr *MI) const {
if (MI->getNumOperands() < 4)
return true;

View File

@ -104,6 +104,8 @@ public:
getNoopForMachoTarget(NopInst);
}
bool isTailCall(const MachineInstr &Inst) const override;
// Return the non-pre/post incrementing version of 'Opc'. Return 0
// if there is not such an opcode.
virtual unsigned getUnindexedOpcode(unsigned Opc) const =0;