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https://github.com/RPCS3/llvm-mirror.git
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Replace the "movnt" intrinsics with a native store + nontemporal metadata bit.
<rdar://problem/8460511> llvm-svn: 130791
This commit is contained in:
Bill Wendling
parent
9884b02bef
commit
67f5e8f0a7
@ -1875,21 +1875,6 @@ defm RCP : sse1_fp_unop_s<0x53, "rcp", X86frcp, int_x86_sse_rcp_ss>,
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// SSE 1 & 2 - Non-temporal stores
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//===----------------------------------------------------------------------===//
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def VMOVNTPSmr_Int : VPSI<0x2B, MRMDestMem, (outs),
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(ins i128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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[(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>, VEX;
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def VMOVNTPDmr_Int : VPDI<0x2B, MRMDestMem, (outs),
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(ins i128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>, VEX;
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let ExeDomain = SSEPackedInt in
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def VMOVNTDQmr_Int : VPDI<0xE7, MRMDestMem, (outs),
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(ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>, VEX;
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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def VMOVNTPSmr : VPSI<0x2B, MRMDestMem, (outs),
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(ins f128mem:$dst, VR128:$src),
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@ -1906,12 +1891,16 @@ let AddedComplexity = 400 in { // Prefer non-temporal versions
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v2f64 VR128:$src),
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addr:$dst)]>, VEX;
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let ExeDomain = SSEPackedInt in
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def VMOVNTDQmr : VPDI<0xE7, MRMDestMem, (outs),
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(ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src),
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addr:$dst)]>, VEX;
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def VMOVNTDQmr : VPDI<0xE7, MRMDestMem, (outs),
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(ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src),
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addr:$dst)]>, VEX;
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def : Pat<(alignednontemporalstore (v2i64 VR128:$src), addr:$dst),
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(VMOVNTDQmr addr:$dst, VR128:$src)>;
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def VMOVNTPSYmr : VPSI<0x2B, MRMDestMem, (outs),
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(ins f256mem:$dst, VR256:$src),
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@ -1943,18 +1932,6 @@ def : Pat<(int_x86_avx_movnt_pd_256 addr:$dst, VR256:$src),
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def : Pat<(int_x86_avx_movnt_ps_256 addr:$dst, VR256:$src),
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(VMOVNTPSYmr addr:$dst, VR256:$src)>;
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def MOVNTPSmr_Int : PSI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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[(int_x86_sse_movnt_ps addr:$dst, VR128:$src)]>;
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def MOVNTPDmr_Int : PDI<0x2B, MRMDestMem, (outs), (ins i128mem:$dst, VR128:$src),
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"movntpd\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_pd addr:$dst, VR128:$src)]>;
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let ExeDomain = SSEPackedInt in
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def MOVNTDQmr_Int : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_dq addr:$dst, VR128:$src)]>;
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let AddedComplexity = 400 in { // Prefer non-temporal versions
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def MOVNTPSmr : PSI<0x2B, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntps\t{$src, $dst|$dst, $src}",
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@ -1972,22 +1949,19 @@ def MOVNTDQmr : PDI<0xE7, MRMDestMem, (outs), (ins f128mem:$dst, VR128:$src),
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"movntdq\t{$src, $dst|$dst, $src}",
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[(alignednontemporalstore (v4f32 VR128:$src), addr:$dst)]>;
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def : Pat<(alignednontemporalstore (v2i64 VR128:$src), addr:$dst),
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(MOVNTDQmr addr:$dst, VR128:$src)>;
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// There is no AVX form for instructions below this point
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def MOVNTImr : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(nontemporalstore (i32 GR32:$src), addr:$dst)]>,
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TB, Requires<[HasSSE2]>;
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def MOVNTI_64mr : RI<0xC3, MRMDestMem, (outs), (ins i64mem:$dst, GR64:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(nontemporalstore (i64 GR64:$src), addr:$dst)]>,
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TB, Requires<[HasSSE2]>;
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}
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def MOVNTImr_Int : I<0xC3, MRMDestMem, (outs), (ins i32mem:$dst, GR32:$src),
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"movnti\t{$src, $dst|$dst, $src}",
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[(int_x86_sse2_movnt_i addr:$dst, GR32:$src)]>,
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TB, Requires<[HasSSE2]>;
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//===----------------------------------------------------------------------===//
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// SSE 1 & 2 - Misc Instructions (No AVX form)
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@ -533,6 +533,13 @@ static bool UpgradeIntrinsicFunction1(Function *F, Function *&NewFn) {
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// Calls to these instructions are transformed into unaligned loads.
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NewFn = 0;
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return true;
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} else if (Name.compare(5, 16, "x86.sse.movnt.ps", 16) == 0 ||
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Name.compare(5, 17, "x86.sse2.movnt.dq", 17) == 0 ||
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Name.compare(5, 17, "x86.sse2.movnt.pd", 17) == 0 ||
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Name.compare(5, 17, "x86.sse2.movnt.i", 16) == 0) {
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// Calls to these instructions are transformed into nontemporal stores.
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NewFn = 0;
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return true;
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} else if (Name.compare(5, 17, "x86.ssse3.pshuf.w", 17) == 0) {
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// This is an SSE/MMX instruction.
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const Type *X86_MMXTy = VectorType::getX86_MMXTy(FTy->getContext());
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@ -973,6 +980,31 @@ void llvm::UpgradeIntrinsicCall(CallInst *CI, Function *NewFn) {
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if (!CI->use_empty())
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CI->replaceAllUsesWith(BC);
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// Remove intrinsic.
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CI->eraseFromParent();
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} else if (F->getName() == "llvm.x86.sse.movnt.ps" ||
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F->getName() == "llvm.x86.sse2.movnt.dq" ||
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F->getName() == "llvm.x86.sse2.movnt.pd" ||
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F->getName() == "llvm.x86.sse2.movnt.i") {
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IRBuilder<> Builder(C);
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Builder.SetInsertPoint(CI->getParent(), CI);
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Module *M = F->getParent();
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SmallVector<Value *, 1> Elts;
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Elts.push_back(ConstantInt::get(Type::getInt32Ty(C), 1));
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MDNode *Node = MDNode::get(C, Elts);
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Value *Arg0 = CI->getArgOperand(0);
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Value *Arg1 = CI->getArgOperand(1);
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// Convert the type of the pointer to a pointer to the stored type.
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Value *BC = Builder.CreateBitCast(Arg0,
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PointerType::getUnqual(Arg1->getType()),
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"cast");
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StoreInst *SI = Builder.CreateStore(Arg1, BC);
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SI->setMetadata(M->getMDKindID("nontemporal"), Node);
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SI->setAlignment(16);
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// Remove intrinsic.
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CI->eraseFromParent();
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} else {
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@ -10,6 +10,7 @@
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; RUN: not grep {llvm\\.x86\\.sse2\\.loadu}
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; RUN: llvm-as < %s | llvm-dis | \
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; RUN: grep {llvm\\.x86\\.mmx\\.ps} | grep {x86_mmx} | count 16
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; RUN: llvm-as < %s | llvm-dis | FileCheck %s
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declare i32 @llvm.ctpop.i28(i28 %val)
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declare i32 @llvm.cttz.i29(i29 %val)
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@ -91,3 +92,20 @@ define void @test_loadu(i8* %a, double* %b) {
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%v2 = call <2 x double> @llvm.x86.sse2.loadu.pd(double* %b)
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ret void
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}
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declare void @llvm.x86.sse.movnt.ps(i8*, <4 x float>) nounwind readnone
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declare void @llvm.x86.sse2.movnt.dq(i8*, <2 x double>) nounwind readnone
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declare void @llvm.x86.sse2.movnt.pd(i8*, <2 x double>) nounwind readnone
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declare void @llvm.x86.sse2.movnt.i(i8*, i32) nounwind readnone
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define void @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D) {
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; CHECK: store{{.*}}nontemporal
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call void @llvm.x86.sse.movnt.ps(i8* %B, <4 x float> %A)
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; CHECK: store{{.*}}nontemporal
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call void @llvm.x86.sse2.movnt.dq(i8* %B, <2 x double> %C)
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; CHECK: store{{.*}}nontemporal
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call void @llvm.x86.sse2.movnt.pd(i8* %B, <2 x double> %C)
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; CHECK: store{{.*}}nontemporal
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call void @llvm.x86.sse2.movnt.i(i8* %B, i32 %D)
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ret void
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}
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19
test/CodeGen/X86/nontemporal.ll
Normal file
19
test/CodeGen/X86/nontemporal.ll
Normal file
@ -0,0 +1,19 @@
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; RUN: llc < %s -march=x86 -mattr=+sse2 | FileCheck %s
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define void @f(<4 x float> %A, i8* %B, <2 x double> %C, i32 %D, <2 x i64> %E) {
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; CHECK: movntps
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%cast = bitcast i8* %B to <4 x float>*
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store <4 x float> %A, <4 x float>* %cast, align 16, !nontemporal !0
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; CHECK: movntdq
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%cast1 = bitcast i8* %B to <2 x i64>*
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store <2 x i64> %E, <2 x i64>* %cast1, align 16, !nontemporal !0
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; CHECK: movntpd
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%cast2 = bitcast i8* %B to <2 x double>*
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store <2 x double> %C, <2 x double>* %cast2, align 16, !nontemporal !0
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; CHECK: movnti
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%cast3 = bitcast i8* %B to i32*
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store i32 %D, i32* %cast3, align 16, !nontemporal !0
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ret void
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}
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!0 = metadata !{i32 1}
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