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[AArch64] Support expression results as immediate values in mov
Summary: This patch adds support of using the result of an expression as an immediate value. For example, 0: .skip 4 1: mov x0, 1b - 0b is assembled to mov x0, #4 Currently it does not support expressions requiring relocation unless explicitly specified. This fixes PR#45781. Reviewers: peter.smith, ostannard, efriedma Reviewed By: efriedma Subscribers: nickdesaulniers, llozano, manojgupta, efriedma, ostannard, kristof.beyls, hiraditya, danielkiss, llvm-commits Tags: #llvm Differential Revision: https://reviews.llvm.org/D80028
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@ -970,11 +970,15 @@ public:
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bool isMOVZMovAlias() const {
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bool isMOVZMovAlias() const {
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if (!isImm()) return false;
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if (!isImm()) return false;
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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const MCExpr *E = getImm();
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if (!CE) return false;
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if (const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(E)) {
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uint64_t Value = CE->getValue();
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uint64_t Value = CE->getValue();
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return AArch64_AM::isMOVZMovAlias(Value, Shift, RegWidth);
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return AArch64_AM::isMOVZMovAlias(Value, Shift, RegWidth);
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}
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// Only supports the case of Shift being 0 if an expression is used as an
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// operand
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return !Shift && E;
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}
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}
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template<int RegWidth, int Shift>
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template<int RegWidth, int Shift>
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@ -1774,9 +1778,13 @@ public:
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void addMOVZMovAliasOperands(MCInst &Inst, unsigned N) const {
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void addMOVZMovAliasOperands(MCInst &Inst, unsigned N) const {
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assert(N == 1 && "Invalid number of operands!");
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assert(N == 1 && "Invalid number of operands!");
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const MCConstantExpr *CE = cast<MCConstantExpr>(getImm());
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const MCConstantExpr *CE = dyn_cast<MCConstantExpr>(getImm());
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uint64_t Value = CE->getValue();
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if (CE) {
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Inst.addOperand(MCOperand::createImm((Value >> Shift) & 0xffff));
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uint64_t Value = CE->getValue();
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Inst.addOperand(MCOperand::createImm((Value >> Shift) & 0xffff));
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} else {
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addExpr(Inst, getImm());
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}
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}
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}
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template<int Shift>
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template<int Shift>
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@ -243,11 +243,22 @@ static uint64_t adjustFixupValue(const MCFixup &Fixup, const MCValue &Target,
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static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
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static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
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if (AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_ABS &&
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if (AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_ABS &&
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AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_SABS) {
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AArch64MCExpr::getSymbolLoc(RefKind) != AArch64MCExpr::VK_SABS) {
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// VK_GOTTPREL, VK_TPREL, VK_DTPREL are movw fixups, but they can't
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if (!RefKind) {
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// ever be resolved in the assembler.
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// The fixup is an expression
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Ctx.reportError(Fixup.getLoc(),
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if (SignedValue > 0xFFFF || SignedValue < -0xFFFF)
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"relocation for a thread-local variable points to an "
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Ctx.reportError(Fixup.getLoc(),
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"absolute symbol");
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"fixup value out of range [-0xFFFF, 0xFFFF]");
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// Invert the negative immediate because it will feed into a MOVN.
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if (SignedValue < 0)
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SignedValue = ~SignedValue;
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Value = static_cast<uint64_t>(SignedValue);
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} else
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// VK_GOTTPREL, VK_TPREL, VK_DTPREL are movw fixups, but they can't
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// ever be resolved in the assembler.
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Ctx.reportError(Fixup.getLoc(),
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"relocation for a thread-local variable points to an "
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"absolute symbol");
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return Value;
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return Value;
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}
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}
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@ -440,8 +451,9 @@ void AArch64AsmBackend::applyFixup(const MCAssembler &Asm, const MCFixup &Fixup,
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// FIXME: getFixupKindInfo() and getFixupKindNumBytes() could be fixed to
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// FIXME: getFixupKindInfo() and getFixupKindNumBytes() could be fixed to
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// handle this more cleanly. This may affect the output of -show-mc-encoding.
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// handle this more cleanly. This may affect the output of -show-mc-encoding.
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AArch64MCExpr::VariantKind RefKind =
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AArch64MCExpr::VariantKind RefKind =
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static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
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static_cast<AArch64MCExpr::VariantKind>(Target.getRefKind());
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if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS) {
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if (AArch64MCExpr::getSymbolLoc(RefKind) == AArch64MCExpr::VK_SABS ||
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(!RefKind && Fixup.getTargetKind() == AArch64::fixup_aarch64_movw)) {
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// If the immediate is negative, generate MOVN else MOVZ.
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// If the immediate is negative, generate MOVN else MOVZ.
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// (Bit 30 = 0) ==> MOVN, (Bit 30 = 1) ==> MOVZ.
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// (Bit 30 = 0) ==> MOVN, (Bit 30 = 1) ==> MOVZ.
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if (SignedValue < 0)
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if (SignedValue < 0)
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@ -569,23 +569,24 @@ unsigned AArch64MCCodeEmitter::fixMOVZ(const MCInst &MI, unsigned EncodedValue,
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if (UImm16MO.isImm())
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if (UImm16MO.isImm())
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return EncodedValue;
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return EncodedValue;
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const AArch64MCExpr *A64E = cast<AArch64MCExpr>(UImm16MO.getExpr());
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const MCExpr *E = UImm16MO.getExpr();
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switch (A64E->getKind()) {
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if (const AArch64MCExpr *A64E = dyn_cast<AArch64MCExpr>(E)) {
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case AArch64MCExpr::VK_DTPREL_G2:
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switch (A64E->getKind()) {
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case AArch64MCExpr::VK_DTPREL_G1:
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case AArch64MCExpr::VK_DTPREL_G2:
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case AArch64MCExpr::VK_DTPREL_G0:
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case AArch64MCExpr::VK_DTPREL_G1:
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case AArch64MCExpr::VK_GOTTPREL_G1:
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case AArch64MCExpr::VK_DTPREL_G0:
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case AArch64MCExpr::VK_TPREL_G2:
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case AArch64MCExpr::VK_GOTTPREL_G1:
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case AArch64MCExpr::VK_TPREL_G1:
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case AArch64MCExpr::VK_TPREL_G2:
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case AArch64MCExpr::VK_TPREL_G0:
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case AArch64MCExpr::VK_TPREL_G1:
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return EncodedValue & ~(1u << 30);
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case AArch64MCExpr::VK_TPREL_G0:
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default:
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return EncodedValue & ~(1u << 30);
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// Nothing to do for an unsigned fixup.
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default:
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return EncodedValue;
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// Nothing to do for an unsigned fixup.
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return EncodedValue;
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}
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}
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}
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return EncodedValue;
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return EncodedValue & ~(1u << 30);
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}
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}
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void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
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void AArch64MCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS,
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@ -167,9 +167,9 @@
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// MOV alias should not accept any fiddling
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// MOV alias should not accept any fiddling
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mov x2, xsp, #123
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mov x2, xsp, #123
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mov wsp, w27, #0xfff, lsl #12
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mov wsp, w27, #0xfff, lsl #12
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// CHECK-ERROR: error: expected compatible register or logical immediate
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// CHECK-ERROR: error: invalid operand for instruction
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// CHECK-ERROR-NEXT: mov x2, xsp, #123
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// CHECK-ERROR-NEXT: mov x2, xsp, #123
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: error: invalid operand for instruction
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// CHECK-ERROR-NEXT: error: invalid operand for instruction
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// CHECK-ERROR-NEXT: mov wsp, w27, #0xfff, lsl #12
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// CHECK-ERROR-NEXT: mov wsp, w27, #0xfff, lsl #12
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// CHECK-ERROR-NEXT: ^
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// CHECK-ERROR-NEXT: ^
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test/MC/AArch64/mov-expr-as-immediate.s
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test/MC/AArch64/mov-expr-as-immediate.s
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@ -0,0 +1,16 @@
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// RUN: llvm-mc -triple aarch64-none-linux-gnu %s -filetype=obj -o %t | llvm-objdump --triple aarch64-none-linux-gnu -Dr %t | FileCheck %s
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0:
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.skip 4
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1:
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mov x0, 1b - 0b
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// CHECK: mov x0, #4
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mov x0, 0b - 1b
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// CHECK: mov x0, #-4
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mov x0, 0b - 0b
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// CHECK: mov x0, #0
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mov x0, 1b - 2 - 0b + 6
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// CHECK: mov x0, #8
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mov x0, #:abs_g0_s:1b
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// CHECK: mov x0, #0
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// CHECK-NEXT: R_AARCH64_MOVW_SABS_G0 .text+0x4
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test/MC/AArch64/mov-expression-as-immediate.s
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test/MC/AArch64/mov-expression-as-immediate.s
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@ -0,0 +1,9 @@
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// RUN: llvm-mc -triple aarch64-none-linux-gnu %s -filetype=obj -o %t | llvm-objdump -d %t | FileCheck %s
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0:
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.skip 4
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1:
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mov x0, 1b - 0b
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// CHECK: mov x0, #4
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mov x0, 0b - 1b
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// CHECK: mov x0, #-4
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test/MC/AArch64/mov-unsupported-expr-as-immediate.s
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test/MC/AArch64/mov-unsupported-expr-as-immediate.s
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@ -0,0 +1,17 @@
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// RUN: not llvm-mc -triple aarch64-none-linux-gnu %s -filetype=obj -o /dev/null 2>&1 | FileCheck %s
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0:
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.skip 0x10000
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1:
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mov x0, 1b - 0b
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// CHECK: error: fixup value out of range
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// CHECK: mov x0, 1b - 0b
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// CHECK: ^
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mov x0, 0b - 1b
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// CHECK: error: fixup value out of range
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// CHECK: mov x0, 0b - 1b
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// CHECK: ^
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mov x0, 1b
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// CHECK: error: invalid fixup for movz/movk instruction
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// CHECK: mov x0, 1b
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// CHECK: ^
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