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Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
llvm-svn: 33775
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parent
73975a6076
commit
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@ -859,7 +859,7 @@ static bool isFloatingPointZero(SDOperand Op) {
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return false;
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}
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static bool isLegalCmpImmediate(int C, bool isThumb) {
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static bool isLegalCmpImmediate(unsigned C, bool isThumb) {
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return ( isThumb && (C & ~255U) == 0) ||
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(!isThumb && ARM_AM::getSOImmVal(C) != -1);
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}
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@ -869,38 +869,36 @@ static bool isLegalCmpImmediate(int C, bool isThumb) {
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static SDOperand getARMCmp(SDOperand LHS, SDOperand RHS, ISD::CondCode CC,
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SDOperand &ARMCC, SelectionDAG &DAG, bool isThumb) {
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if (ConstantSDNode *RHSC = dyn_cast<ConstantSDNode>(RHS.Val)) {
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int C = (int)RHSC->getValue();
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unsigned C = RHSC->getValue();
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if (!isLegalCmpImmediate(C, isThumb)) {
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// Constant does not fit, try adjusting it by one?
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switch (CC) {
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default: break;
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case ISD::SETLT:
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case ISD::SETULT:
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case ISD::SETGE:
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case ISD::SETUGE:
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if (isLegalCmpImmediate(C-1, isThumb)) {
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switch (CC) {
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default: break;
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case ISD::SETLT: CC = ISD::SETLE; break;
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case ISD::SETULT: CC = ISD::SETULE; break;
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case ISD::SETGE: CC = ISD::SETGT; break;
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case ISD::SETUGE: CC = ISD::SETUGT; break;
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}
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CC = (CC == ISD::SETLT) ? ISD::SETLE : ISD::SETGT;
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RHS = DAG.getConstant(C-1, MVT::i32);
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}
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break;
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case ISD::SETULT:
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case ISD::SETUGE:
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if (C > 0 && isLegalCmpImmediate(C-1, isThumb)) {
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CC = (CC == ISD::SETULT) ? ISD::SETULE : ISD::SETUGT;
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RHS = DAG.getConstant(C-1, MVT::i32);
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}
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break;
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case ISD::SETLE:
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case ISD::SETULE:
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case ISD::SETGT:
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case ISD::SETUGT:
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if (isLegalCmpImmediate(C+1, isThumb)) {
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switch (CC) {
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default: break;
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case ISD::SETLE: CC = ISD::SETLT; break;
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case ISD::SETULE: CC = ISD::SETULT; break;
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case ISD::SETGT: CC = ISD::SETGE; break;
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case ISD::SETUGT: CC = ISD::SETUGE; break;
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}
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CC = (CC == ISD::SETLE) ? ISD::SETLT : ISD::SETGE;
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RHS = DAG.getConstant(C+1, MVT::i32);
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}
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break;
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case ISD::SETULE:
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case ISD::SETUGT:
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if (C < 0xffffffff && isLegalCmpImmediate(C+1, isThumb)) {
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CC = (CC == ISD::SETULE) ? ISD::SETULT : ISD::SETUGE;
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RHS = DAG.getConstant(C+1, MVT::i32);
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}
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break;
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