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Teach machine cse to commute instructions.
llvm-svn: 121903
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parent
438a9a1367
commit
68e1ed8752
@ -24,7 +24,6 @@
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#include "llvm/ADT/ScopedHashTable.h"
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#include "llvm/ADT/SmallSet.h"
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#include "llvm/ADT/Statistic.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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using namespace llvm;
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@ -33,6 +32,7 @@ STATISTIC(NumCoalesces, "Number of copies coalesced");
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STATISTIC(NumCSEs, "Number of common subexpression eliminated");
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STATISTIC(NumPhysCSEs,
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"Number of physreg referencing common subexpr eliminated");
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STATISTIC(NumCommutes, "Number of copies coalesced after commuting");
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namespace {
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class MachineCSE : public MachineFunctionPass {
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@ -368,7 +368,22 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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FoundCSE = VNT.count(MI);
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}
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}
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// FIXME: commute commutable instructions?
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// Commute commutable instructions.
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bool Commuted = false;
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if (!FoundCSE && MI->getDesc().isCommutable()) {
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MachineInstr *NewMI = TII->commuteInstruction(MI);
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if (NewMI) {
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Commuted = true;
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FoundCSE = VNT.count(NewMI);
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if (NewMI != MI)
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// New instruction. It doesn't need to be kept.
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NewMI->eraseFromParent();
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else if (!FoundCSE)
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// MI was changed but it didn't help, commute it back!
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(void)TII->commuteInstruction(MI);
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}
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}
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// If the instruction defines physical registers and the values *may* be
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// used, then it's not safe to replace it with a common subexpression.
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@ -430,6 +445,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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++NumCSEs;
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if (!PhysRefs.empty())
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++NumPhysCSEs;
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if (Commuted)
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++NumCommutes;
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} else {
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DEBUG(dbgs() << "*** Not profitable, avoid CSE!\n");
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VNT.insert(MI, CurrVN++);
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@ -37,3 +37,43 @@ bb3:
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declare void @bar(i32*)
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declare fastcc i8* @foo(%struct.s2*) nounwind
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; rdar://8773371
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declare void @printf(...) nounwind
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define void @commute(i32 %test_case, i32 %scale) nounwind ssp {
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; CHECK: commute:
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entry:
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switch i32 %test_case, label %sw.bb307 [
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i32 1, label %sw.bb
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i32 2, label %sw.bb
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i32 3, label %sw.bb
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]
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sw.bb: ; preds = %entry, %entry, %entry
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%mul = mul nsw i32 %test_case, 3
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%mul20 = mul nsw i32 %mul, %scale
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br i1 undef, label %if.end34, label %sw.bb307
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if.end34: ; preds = %sw.bb
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; CHECK: %if.end34
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; CHECK: imull
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; CHECK: leal
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; CHECK-NOT: imull
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tail call void (...)* @printf(i32 %test_case, i32 %mul20) nounwind
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%tmp = mul i32 %scale, %test_case
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%tmp752 = mul i32 %tmp, 3
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%tmp753 = zext i32 %tmp752 to i64
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br label %bb.nph743.us
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for.body53.us: ; preds = %bb.nph743.us, %for.body53.us
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%exitcond = icmp eq i64 undef, %tmp753
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br i1 %exitcond, label %bb.nph743.us, label %for.body53.us
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bb.nph743.us: ; preds = %for.body53.us, %if.end34
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br label %for.body53.us
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sw.bb307: ; preds = %sw.bb, %entry
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ret void
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}
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