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[TargetLowering] Improve expansion of FSHL/FSHR
Use an extra shift-by-1 instead of a compare and select to handle the shift-by-zero case. This sometimes saves one instruction (if the compare couldn't be combined with a previous instruction). It also works better on targets that don't have good select instructions. Note that currently this change doesn't affect most targets because expandFunnelShift is not used because funnel shift intrinsics are lowered early in SelectionDAGBuilder. But there is work afoot to change that; see D77152. Differential Revision: https://reviews.llvm.org/D77301
This commit is contained in:
Jay Foad
parent
d9c7a01b62
commit
68e4349111
@ -6046,8 +6046,8 @@ bool TargetLowering::expandFunnelShift(SDNode *Node, SDValue &Result,
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!isOperationLegalOrCustomOrPromote(ISD::OR, VT)))
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return false;
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// fshl: (X << (Z % BW)) | (Y >> (BW - (Z % BW)))
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// fshr: (X << (BW - (Z % BW))) | (Y >> (Z % BW))
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// fshl: X << (Z % BW) | Y >> 1 >> (BW - 1 - (Z % BW))
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// fshr: X << 1 << (BW - 1 - (Z % BW)) | Y >> (Z % BW)
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SDValue X = Node->getOperand(0);
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SDValue Y = Node->getOperand(1);
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SDValue Z = Node->getOperand(2);
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@ -6057,30 +6057,29 @@ bool TargetLowering::expandFunnelShift(SDNode *Node, SDValue &Result,
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SDLoc DL(SDValue(Node, 0));
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EVT ShVT = Z.getValueType();
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SDValue BitWidthC = DAG.getConstant(EltSizeInBits, DL, ShVT);
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SDValue Zero = DAG.getConstant(0, DL, ShVT);
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SDValue Mask = DAG.getConstant(EltSizeInBits - 1, DL, ShVT);
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SDValue ShAmt;
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if (isPowerOf2_32(EltSizeInBits)) {
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SDValue Mask = DAG.getConstant(EltSizeInBits - 1, DL, ShVT);
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// Z % BW -> Z & (BW - 1)
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ShAmt = DAG.getNode(ISD::AND, DL, ShVT, Z, Mask);
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} else {
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SDValue BitWidthC = DAG.getConstant(EltSizeInBits, DL, ShVT);
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ShAmt = DAG.getNode(ISD::UREM, DL, ShVT, Z, BitWidthC);
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}
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SDValue InvShAmt = DAG.getNode(ISD::SUB, DL, ShVT, Mask, ShAmt);
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SDValue InvShAmt = DAG.getNode(ISD::SUB, DL, ShVT, BitWidthC, ShAmt);
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SDValue ShX = DAG.getNode(ISD::SHL, DL, VT, X, IsFSHL ? ShAmt : InvShAmt);
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SDValue ShY = DAG.getNode(ISD::SRL, DL, VT, Y, IsFSHL ? InvShAmt : ShAmt);
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SDValue Or = DAG.getNode(ISD::OR, DL, VT, ShX, ShY);
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// If (Z % BW == 0), then the opposite direction shift is shift-by-bitwidth,
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// and that is undefined. We must compare and select to avoid UB.
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EVT CCVT = getSetCCResultType(DAG.getDataLayout(), *DAG.getContext(), ShVT);
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// For fshl, 0-shift returns the 1st arg (X).
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// For fshr, 0-shift returns the 2nd arg (Y).
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SDValue IsZeroShift = DAG.getSetCC(DL, CCVT, ShAmt, Zero, ISD::SETEQ);
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Result = DAG.getSelect(DL, VT, IsZeroShift, IsFSHL ? X : Y, Or);
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SDValue One = DAG.getConstant(1, DL, ShVT);
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SDValue ShX, ShY;
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if (IsFSHL) {
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ShX = DAG.getNode(ISD::SHL, DL, VT, X, ShAmt);
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SDValue ShY1 = DAG.getNode(ISD::SRL, DL, VT, Y, One);
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ShY = DAG.getNode(ISD::SRL, DL, VT, ShY1, InvShAmt);
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} else {
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SDValue ShX1 = DAG.getNode(ISD::SHL, DL, VT, X, One);
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ShX = DAG.getNode(ISD::SHL, DL, VT, ShX1, InvShAmt);
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ShY = DAG.getNode(ISD::SRL, DL, VT, Y, ShAmt);
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}
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Result = DAG.getNode(ISD::OR, DL, VT, ShX, ShY);
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return true;
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}
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@ -65,27 +65,16 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
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;
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; X86-SLOW-LABEL: var_shift_i16:
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; X86-SLOW: # %bb.0:
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; X86-SLOW-NEXT: pushl %edi
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; X86-SLOW-NEXT: pushl %esi
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; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %esi
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; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %dl
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; X86-SLOW-NEXT: andb $15, %dl
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: movl %eax, %edi
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; X86-SLOW-NEXT: movl %edx, %ecx
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; X86-SLOW-NEXT: shll %cl, %edi
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; X86-SLOW-NEXT: movb $16, %cl
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; X86-SLOW-NEXT: subb %dl, %cl
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; X86-SLOW-NEXT: shrl %cl, %esi
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; X86-SLOW-NEXT: testb %dl, %dl
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; X86-SLOW-NEXT: je .LBB1_2
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; X86-SLOW-NEXT: # %bb.1:
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; X86-SLOW-NEXT: orl %esi, %edi
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; X86-SLOW-NEXT: movl %edi, %eax
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; X86-SLOW-NEXT: .LBB1_2:
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; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-SLOW-NEXT: andb $15, %cl
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; X86-SLOW-NEXT: shll %cl, %edx
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; X86-SLOW-NEXT: shrl %eax
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; X86-SLOW-NEXT: xorb $15, %cl
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; X86-SLOW-NEXT: shrl %cl, %eax
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; X86-SLOW-NEXT: orl %edx, %eax
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; X86-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
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; X86-SLOW-NEXT: popl %esi
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; X86-SLOW-NEXT: popl %edi
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; X86-SLOW-NEXT: retl
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;
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; X64-FAST-LABEL: var_shift_i16:
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@ -100,17 +89,15 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
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;
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; X64-SLOW-LABEL: var_shift_i16:
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; X64-SLOW: # %bb.0:
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; X64-SLOW-NEXT: movzwl %si, %eax
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; X64-SLOW-NEXT: andb $15, %dl
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; X64-SLOW-NEXT: movl %edi, %esi
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; X64-SLOW-NEXT: movl %edx, %ecx
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; X64-SLOW-NEXT: shll %cl, %esi
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; X64-SLOW-NEXT: movb $16, %cl
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; X64-SLOW-NEXT: subb %dl, %cl
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; X64-SLOW-NEXT: movzwl %si, %eax
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; X64-SLOW-NEXT: andb $15, %cl
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; X64-SLOW-NEXT: shll %cl, %edi
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; X64-SLOW-NEXT: xorb $15, %cl
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; X64-SLOW-NEXT: shrl %eax
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; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
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; X64-SLOW-NEXT: shrl %cl, %eax
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; X64-SLOW-NEXT: orl %esi, %eax
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; X64-SLOW-NEXT: testb %dl, %dl
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; X64-SLOW-NEXT: cmovel %edi, %eax
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; X64-SLOW-NEXT: orl %edi, %eax
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; X64-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
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; X64-SLOW-NEXT: retq
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%tmp = tail call i16 @llvm.fshl.i16(i16 %x, i16 %y, i16 %z)
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@ -128,26 +115,15 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
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;
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; X86-SLOW-LABEL: var_shift_i32:
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; X86-SLOW: # %bb.0:
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; X86-SLOW-NEXT: pushl %edi
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; X86-SLOW-NEXT: pushl %esi
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %dl
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: movl %eax, %edi
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; X86-SLOW-NEXT: movl %edx, %ecx
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; X86-SLOW-NEXT: shll %cl, %edi
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; X86-SLOW-NEXT: andb $31, %dl
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; X86-SLOW-NEXT: movl %edx, %ecx
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; X86-SLOW-NEXT: negb %cl
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; X86-SLOW-NEXT: shrl %cl, %esi
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; X86-SLOW-NEXT: testb %dl, %dl
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; X86-SLOW-NEXT: je .LBB2_2
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; X86-SLOW-NEXT: # %bb.1:
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; X86-SLOW-NEXT: orl %esi, %edi
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; X86-SLOW-NEXT: movl %edi, %eax
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; X86-SLOW-NEXT: .LBB2_2:
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; X86-SLOW-NEXT: popl %esi
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; X86-SLOW-NEXT: popl %edi
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; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-SLOW-NEXT: shll %cl, %edx
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; X86-SLOW-NEXT: shrl %eax
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; X86-SLOW-NEXT: andb $31, %cl
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; X86-SLOW-NEXT: xorb $31, %cl
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; X86-SLOW-NEXT: shrl %cl, %eax
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; X86-SLOW-NEXT: orl %edx, %eax
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; X86-SLOW-NEXT: retl
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;
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; X64-FAST-LABEL: var_shift_i32:
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@ -160,17 +136,15 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
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;
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; X64-SLOW-LABEL: var_shift_i32:
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; X64-SLOW: # %bb.0:
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; X64-SLOW-NEXT: movl %edx, %ecx
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; X64-SLOW-NEXT: movl %esi, %eax
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; X64-SLOW-NEXT: movl %edi, %esi
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; X64-SLOW-NEXT: movl %edx, %ecx
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; X64-SLOW-NEXT: shll %cl, %esi
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; X64-SLOW-NEXT: andb $31, %dl
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; X64-SLOW-NEXT: movl %edx, %ecx
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; X64-SLOW-NEXT: negb %cl
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; X64-SLOW-NEXT: shll %cl, %edi
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; X64-SLOW-NEXT: shrl %eax
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; X64-SLOW-NEXT: andb $31, %cl
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; X64-SLOW-NEXT: xorb $31, %cl
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; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
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; X64-SLOW-NEXT: shrl %cl, %eax
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; X64-SLOW-NEXT: orl %esi, %eax
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; X64-SLOW-NEXT: testb %dl, %dl
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; X64-SLOW-NEXT: cmovel %edi, %eax
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; X64-SLOW-NEXT: orl %edi, %eax
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; X64-SLOW-NEXT: retq
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%tmp = tail call i32 @llvm.fshl.i32(i32 %x, i32 %y, i32 %z)
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ret i32 %tmp
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@ -279,78 +253,61 @@ define i64 @var_shift_i64(i64 %x, i64 %y, i64 %z) nounwind {
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; X86-SLOW-NEXT: pushl %ebx
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; X86-SLOW-NEXT: pushl %edi
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; X86-SLOW-NEXT: pushl %esi
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; X86-SLOW-NEXT: subl $8, %esp
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebx
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; X86-SLOW-NEXT: andl $63, %ebx
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; X86-SLOW-NEXT: movb $64, %dh
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; X86-SLOW-NEXT: subb %bl, %dh
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; X86-SLOW-NEXT: movl %eax, (%esp) # 4-byte Spill
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; X86-SLOW-NEXT: movb %dh, %cl
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; X86-SLOW-NEXT: shrl %cl, %eax
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; X86-SLOW-NEXT: movb %dh, %dl
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; X86-SLOW-NEXT: andb $31, %dl
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; X86-SLOW-NEXT: movl %edx, %ecx
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; X86-SLOW-NEXT: negb %cl
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; X86-SLOW-NEXT: movl %esi, %ebp
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; X86-SLOW-NEXT: shll %cl, %ebp
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; X86-SLOW-NEXT: testb %dl, %dl
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ecx
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; X86-SLOW-NEXT: movl %ecx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; X86-SLOW-NEXT: je .LBB5_2
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; X86-SLOW-NEXT: # %bb.1:
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; X86-SLOW-NEXT: orl %eax, %ebp
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; X86-SLOW-NEXT: movl %ebp, (%esp) # 4-byte Spill
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; X86-SLOW-NEXT: .LBB5_2:
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
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; X86-SLOW-NEXT: movl %ebp, %eax
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; X86-SLOW-NEXT: movl %ebx, %ecx
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; X86-SLOW-NEXT: shll %cl, %eax
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; X86-SLOW-NEXT: movb %bl, %ch
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; X86-SLOW-NEXT: andb $31, %ch
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; X86-SLOW-NEXT: movb $64, %ch
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; X86-SLOW-NEXT: subb %bl, %ch
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; X86-SLOW-NEXT: movb %ch, %cl
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; X86-SLOW-NEXT: negb %cl
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; X86-SLOW-NEXT: shrl %cl, %edx
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; X86-SLOW-NEXT: andb $31, %cl
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; X86-SLOW-NEXT: xorb $31, %cl
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; X86-SLOW-NEXT: addl %eax, %eax
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; X86-SLOW-NEXT: shll %cl, %eax
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; X86-SLOW-NEXT: movb %bl, %cl
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; X86-SLOW-NEXT: shll %cl, %ebp
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
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; X86-SLOW-NEXT: movl %esi, %edi
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; X86-SLOW-NEXT: shrl %edi
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; X86-SLOW-NEXT: andb $31, %cl
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; X86-SLOW-NEXT: xorb $31, %cl
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; X86-SLOW-NEXT: shrl %cl, %edi
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; X86-SLOW-NEXT: testb %ch, %ch
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; X86-SLOW-NEXT: je .LBB5_4
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; X86-SLOW-NEXT: # %bb.3:
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; X86-SLOW-NEXT: orl %edi, %eax
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; X86-SLOW-NEXT: movl %eax, %ebp
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; X86-SLOW-NEXT: .LBB5_4:
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: movl %eax, %edi
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; X86-SLOW-NEXT: movl %ebx, %ecx
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; X86-SLOW-NEXT: shll %cl, %edi
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; X86-SLOW-NEXT: movb %bl, %cl
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; X86-SLOW-NEXT: shll %cl, %esi
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; X86-SLOW-NEXT: testb $32, %bl
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; X86-SLOW-NEXT: je .LBB5_6
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; X86-SLOW-NEXT: jne .LBB5_1
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; X86-SLOW-NEXT: # %bb.2:
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; X86-SLOW-NEXT: orl %edi, %ebp
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; X86-SLOW-NEXT: jmp .LBB5_3
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; X86-SLOW-NEXT: .LBB5_1:
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; X86-SLOW-NEXT: movl %esi, %ebp
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; X86-SLOW-NEXT: xorl %esi, %esi
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; X86-SLOW-NEXT: .LBB5_3:
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; X86-SLOW-NEXT: movb %ch, %cl
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
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; X86-SLOW-NEXT: shrl %cl, %edi
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; X86-SLOW-NEXT: testb $32, %ch
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; X86-SLOW-NEXT: jne .LBB5_4
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; X86-SLOW-NEXT: # %bb.5:
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; X86-SLOW-NEXT: movl %edi, %ebp
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; X86-SLOW-NEXT: orl %edx, %eax
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; X86-SLOW-NEXT: movl %eax, %ecx
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; X86-SLOW-NEXT: jmp .LBB5_6
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; X86-SLOW-NEXT: .LBB5_4:
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; X86-SLOW-NEXT: movl %edi, %ecx
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; X86-SLOW-NEXT: xorl %edi, %edi
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; X86-SLOW-NEXT: .LBB5_6:
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; X86-SLOW-NEXT: movb %dh, %cl
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; X86-SLOW-NEXT: shrl %cl, %esi
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; X86-SLOW-NEXT: testb $32, %dh
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; X86-SLOW-NEXT: jne .LBB5_7
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; X86-SLOW-NEXT: # %bb.8:
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; X86-SLOW-NEXT: movl (%esp), %ecx # 4-byte Reload
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
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; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
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; X86-SLOW-NEXT: testl %ebx, %ebx
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; X86-SLOW-NEXT: jne .LBB5_10
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; X86-SLOW-NEXT: jmp .LBB5_11
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; X86-SLOW-NEXT: .LBB5_7:
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; X86-SLOW-NEXT: movl %esi, %ecx
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; X86-SLOW-NEXT: xorl %esi, %esi
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; X86-SLOW-NEXT: testl %ebx, %ebx
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; X86-SLOW-NEXT: je .LBB5_11
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; X86-SLOW-NEXT: .LBB5_10:
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; X86-SLOW-NEXT: orl %esi, %ebp
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; X86-SLOW-NEXT: orl %ecx, %edi
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; X86-SLOW-NEXT: movl %ebp, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
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; X86-SLOW-NEXT: movl %edi, %eax
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; X86-SLOW-NEXT: .LBB5_11:
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; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %edx # 4-byte Reload
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; X86-SLOW-NEXT: addl $8, %esp
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; X86-SLOW-NEXT: je .LBB5_8
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; X86-SLOW-NEXT: # %bb.7:
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; X86-SLOW-NEXT: orl %edi, %ebp
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; X86-SLOW-NEXT: orl %ecx, %esi
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; X86-SLOW-NEXT: movl %ebp, %edx
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; X86-SLOW-NEXT: movl %esi, %eax
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; X86-SLOW-NEXT: .LBB5_8:
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; X86-SLOW-NEXT: popl %esi
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; X86-SLOW-NEXT: popl %edi
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; X86-SLOW-NEXT: popl %ebx
|
||||
@ -367,17 +324,15 @@ define i64 @var_shift_i64(i64 %x, i64 %y, i64 %z) nounwind {
|
||||
;
|
||||
; X64-SLOW-LABEL: var_shift_i64:
|
||||
; X64-SLOW: # %bb.0:
|
||||
; X64-SLOW-NEXT: movq %rdx, %rcx
|
||||
; X64-SLOW-NEXT: movq %rsi, %rax
|
||||
; X64-SLOW-NEXT: movq %rdi, %rsi
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: shlq %cl, %rsi
|
||||
; X64-SLOW-NEXT: andb $63, %dl
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: negb %cl
|
||||
; X64-SLOW-NEXT: shlq %cl, %rdi
|
||||
; X64-SLOW-NEXT: shrq %rax
|
||||
; X64-SLOW-NEXT: andb $63, %cl
|
||||
; X64-SLOW-NEXT: xorb $63, %cl
|
||||
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $rcx
|
||||
; X64-SLOW-NEXT: shrq %cl, %rax
|
||||
; X64-SLOW-NEXT: orq %rsi, %rax
|
||||
; X64-SLOW-NEXT: testb %dl, %dl
|
||||
; X64-SLOW-NEXT: cmoveq %rdi, %rax
|
||||
; X64-SLOW-NEXT: orq %rdi, %rax
|
||||
; X64-SLOW-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.fshl.i64(i64 %x, i64 %y, i64 %z)
|
||||
ret i64 %tmp
|
||||
|
||||
@ -65,27 +65,16 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
|
||||
;
|
||||
; X86-SLOW-LABEL: var_shift_i16:
|
||||
; X86-SLOW: # %bb.0:
|
||||
; X86-SLOW-NEXT: pushl %edi
|
||||
; X86-SLOW-NEXT: pushl %esi
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %dl
|
||||
; X86-SLOW-NEXT: andb $15, %dl
|
||||
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SLOW-NEXT: movl %eax, %edi
|
||||
; X86-SLOW-NEXT: movl %edx, %ecx
|
||||
; X86-SLOW-NEXT: shrl %cl, %edi
|
||||
; X86-SLOW-NEXT: movb $16, %cl
|
||||
; X86-SLOW-NEXT: subb %dl, %cl
|
||||
; X86-SLOW-NEXT: shll %cl, %esi
|
||||
; X86-SLOW-NEXT: testb %dl, %dl
|
||||
; X86-SLOW-NEXT: je .LBB1_2
|
||||
; X86-SLOW-NEXT: # %bb.1:
|
||||
; X86-SLOW-NEXT: orl %edi, %esi
|
||||
; X86-SLOW-NEXT: movl %esi, %eax
|
||||
; X86-SLOW-NEXT: .LBB1_2:
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SLOW-NEXT: movzwl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SLOW-NEXT: andb $15, %cl
|
||||
; X86-SLOW-NEXT: shrl %cl, %edx
|
||||
; X86-SLOW-NEXT: addl %eax, %eax
|
||||
; X86-SLOW-NEXT: xorb $15, %cl
|
||||
; X86-SLOW-NEXT: shll %cl, %eax
|
||||
; X86-SLOW-NEXT: orl %edx, %eax
|
||||
; X86-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
|
||||
; X86-SLOW-NEXT: popl %esi
|
||||
; X86-SLOW-NEXT: popl %edi
|
||||
; X86-SLOW-NEXT: retl
|
||||
;
|
||||
; X64-FAST-LABEL: var_shift_i16:
|
||||
@ -100,16 +89,16 @@ define i16 @var_shift_i16(i16 %x, i16 %y, i16 %z) nounwind {
|
||||
;
|
||||
; X64-SLOW-LABEL: var_shift_i16:
|
||||
; X64-SLOW: # %bb.0:
|
||||
; X64-SLOW-NEXT: movzwl %si, %eax
|
||||
; X64-SLOW-NEXT: andb $15, %dl
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: shrl %cl, %eax
|
||||
; X64-SLOW-NEXT: movb $16, %cl
|
||||
; X64-SLOW-NEXT: subb %dl, %cl
|
||||
; X64-SLOW-NEXT: shll %cl, %edi
|
||||
; X64-SLOW-NEXT: orl %edi, %eax
|
||||
; X64-SLOW-NEXT: testb %dl, %dl
|
||||
; X64-SLOW-NEXT: cmovel %esi, %eax
|
||||
; X64-SLOW-NEXT: # kill: def $edi killed $edi def $rdi
|
||||
; X64-SLOW-NEXT: movzwl %si, %edx
|
||||
; X64-SLOW-NEXT: andb $15, %cl
|
||||
; X64-SLOW-NEXT: shrl %cl, %edx
|
||||
; X64-SLOW-NEXT: leal (%rdi,%rdi), %eax
|
||||
; X64-SLOW-NEXT: xorb $15, %cl
|
||||
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-SLOW-NEXT: shll %cl, %eax
|
||||
; X64-SLOW-NEXT: orl %edx, %eax
|
||||
; X64-SLOW-NEXT: # kill: def $ax killed $ax killed $eax
|
||||
; X64-SLOW-NEXT: retq
|
||||
%tmp = tail call i16 @llvm.fshr.i16(i16 %x, i16 %y, i16 %z)
|
||||
@ -127,26 +116,15 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
|
||||
;
|
||||
; X86-SLOW-LABEL: var_shift_i32:
|
||||
; X86-SLOW: # %bb.0:
|
||||
; X86-SLOW-NEXT: pushl %edi
|
||||
; X86-SLOW-NEXT: pushl %esi
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %dl
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SLOW-NEXT: movl %eax, %edi
|
||||
; X86-SLOW-NEXT: movl %edx, %ecx
|
||||
; X86-SLOW-NEXT: shrl %cl, %edi
|
||||
; X86-SLOW-NEXT: andb $31, %dl
|
||||
; X86-SLOW-NEXT: movl %edx, %ecx
|
||||
; X86-SLOW-NEXT: negb %cl
|
||||
; X86-SLOW-NEXT: shll %cl, %esi
|
||||
; X86-SLOW-NEXT: testb %dl, %dl
|
||||
; X86-SLOW-NEXT: je .LBB2_2
|
||||
; X86-SLOW-NEXT: # %bb.1:
|
||||
; X86-SLOW-NEXT: orl %edi, %esi
|
||||
; X86-SLOW-NEXT: movl %esi, %eax
|
||||
; X86-SLOW-NEXT: .LBB2_2:
|
||||
; X86-SLOW-NEXT: popl %esi
|
||||
; X86-SLOW-NEXT: popl %edi
|
||||
; X86-SLOW-NEXT: movb {{[0-9]+}}(%esp), %cl
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SLOW-NEXT: shrl %cl, %edx
|
||||
; X86-SLOW-NEXT: addl %eax, %eax
|
||||
; X86-SLOW-NEXT: andb $31, %cl
|
||||
; X86-SLOW-NEXT: xorb $31, %cl
|
||||
; X86-SLOW-NEXT: shll %cl, %eax
|
||||
; X86-SLOW-NEXT: orl %edx, %eax
|
||||
; X86-SLOW-NEXT: retl
|
||||
;
|
||||
; X64-FAST-LABEL: var_shift_i32:
|
||||
@ -159,17 +137,15 @@ define i32 @var_shift_i32(i32 %x, i32 %y, i32 %z) nounwind {
|
||||
;
|
||||
; X64-SLOW-LABEL: var_shift_i32:
|
||||
; X64-SLOW: # %bb.0:
|
||||
; X64-SLOW-NEXT: movl %edi, %eax
|
||||
; X64-SLOW-NEXT: movl %esi, %edi
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: shrl %cl, %edi
|
||||
; X64-SLOW-NEXT: andb $31, %dl
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: negb %cl
|
||||
; X64-SLOW-NEXT: # kill: def $edi killed $edi def $rdi
|
||||
; X64-SLOW-NEXT: shrl %cl, %esi
|
||||
; X64-SLOW-NEXT: leal (%rdi,%rdi), %eax
|
||||
; X64-SLOW-NEXT: andb $31, %cl
|
||||
; X64-SLOW-NEXT: xorb $31, %cl
|
||||
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $ecx
|
||||
; X64-SLOW-NEXT: shll %cl, %eax
|
||||
; X64-SLOW-NEXT: orl %edi, %eax
|
||||
; X64-SLOW-NEXT: testb %dl, %dl
|
||||
; X64-SLOW-NEXT: cmovel %esi, %eax
|
||||
; X64-SLOW-NEXT: orl %esi, %eax
|
||||
; X64-SLOW-NEXT: retq
|
||||
%tmp = tail call i32 @llvm.fshr.i32(i32 %x, i32 %y, i32 %z)
|
||||
ret i32 %tmp
|
||||
@ -276,76 +252,61 @@ define i64 @var_shift_i64(i64 %x, i64 %y, i64 %z) nounwind {
|
||||
; X86-SLOW-NEXT: pushl %esi
|
||||
; X86-SLOW-NEXT: subl $8, %esp
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SLOW-NEXT: movl %eax, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %esi
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebx
|
||||
; X86-SLOW-NEXT: andl $63, %ebx
|
||||
; X86-SLOW-NEXT: movb $64, %al
|
||||
; X86-SLOW-NEXT: subb %bl, %al
|
||||
; X86-SLOW-NEXT: movl %edx, (%esp) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: movl %eax, %ecx
|
||||
; X86-SLOW-NEXT: shll %cl, %edx
|
||||
; X86-SLOW-NEXT: movb %al, %ch
|
||||
; X86-SLOW-NEXT: andb $31, %ch
|
||||
; X86-SLOW-NEXT: movb $64, %ch
|
||||
; X86-SLOW-NEXT: subb %bl, %ch
|
||||
; X86-SLOW-NEXT: movb %ch, %cl
|
||||
; X86-SLOW-NEXT: negb %cl
|
||||
; X86-SLOW-NEXT: movl %esi, %edi
|
||||
; X86-SLOW-NEXT: shrl %cl, %edi
|
||||
; X86-SLOW-NEXT: testb %ch, %ch
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
||||
; X86-SLOW-NEXT: je .LBB5_2
|
||||
; X86-SLOW-NEXT: # %bb.1:
|
||||
; X86-SLOW-NEXT: orl %edi, %edx
|
||||
; X86-SLOW-NEXT: movl %edx, (%esp) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: .LBB5_2:
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SLOW-NEXT: movl %ebx, %ecx
|
||||
; X86-SLOW-NEXT: shrl %cl, %edx
|
||||
; X86-SLOW-NEXT: movb %bl, %ah
|
||||
; X86-SLOW-NEXT: andb $31, %ah
|
||||
; X86-SLOW-NEXT: movb %ah, %cl
|
||||
; X86-SLOW-NEXT: negb %cl
|
||||
; X86-SLOW-NEXT: movl %ebp, %edi
|
||||
; X86-SLOW-NEXT: shll %cl, %edi
|
||||
; X86-SLOW-NEXT: testb %ah, %ah
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %ebp
|
||||
; X86-SLOW-NEXT: je .LBB5_4
|
||||
; X86-SLOW-NEXT: # %bb.3:
|
||||
; X86-SLOW-NEXT: orl %edx, %edi
|
||||
; X86-SLOW-NEXT: movl %edi, %ebp
|
||||
; X86-SLOW-NEXT: .LBB5_4:
|
||||
; X86-SLOW-NEXT: shll %cl, %edx
|
||||
; X86-SLOW-NEXT: movl %edx, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: movl %esi, %edx
|
||||
; X86-SLOW-NEXT: andb $31, %cl
|
||||
; X86-SLOW-NEXT: xorb $31, %cl
|
||||
; X86-SLOW-NEXT: shrl %esi
|
||||
; X86-SLOW-NEXT: shrl %cl, %esi
|
||||
; X86-SLOW-NEXT: movb %bl, %cl
|
||||
; X86-SLOW-NEXT: shrl %cl, %eax
|
||||
; X86-SLOW-NEXT: andb $31, %cl
|
||||
; X86-SLOW-NEXT: xorb $31, %cl
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edi
|
||||
; X86-SLOW-NEXT: movl %ebx, %ecx
|
||||
; X86-SLOW-NEXT: leal (%edi,%edi), %ebp
|
||||
; X86-SLOW-NEXT: shll %cl, %ebp
|
||||
; X86-SLOW-NEXT: movb %bl, %cl
|
||||
; X86-SLOW-NEXT: shrl %cl, %edi
|
||||
; X86-SLOW-NEXT: testb $32, %bl
|
||||
; X86-SLOW-NEXT: je .LBB5_6
|
||||
; X86-SLOW-NEXT: # %bb.5:
|
||||
; X86-SLOW-NEXT: jne .LBB5_1
|
||||
; X86-SLOW-NEXT: # %bb.2:
|
||||
; X86-SLOW-NEXT: orl %eax, %ebp
|
||||
; X86-SLOW-NEXT: jmp .LBB5_3
|
||||
; X86-SLOW-NEXT: .LBB5_1:
|
||||
; X86-SLOW-NEXT: movl %edi, %ebp
|
||||
; X86-SLOW-NEXT: xorl %edi, %edi
|
||||
; X86-SLOW-NEXT: .LBB5_3:
|
||||
; X86-SLOW-NEXT: movb %ch, %cl
|
||||
; X86-SLOW-NEXT: shll %cl, %edx
|
||||
; X86-SLOW-NEXT: testb $32, %ch
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %eax
|
||||
; X86-SLOW-NEXT: jne .LBB5_4
|
||||
; X86-SLOW-NEXT: # %bb.5:
|
||||
; X86-SLOW-NEXT: movl %edx, (%esp) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %ecx # 4-byte Reload
|
||||
; X86-SLOW-NEXT: orl %esi, %ecx
|
||||
; X86-SLOW-NEXT: jmp .LBB5_6
|
||||
; X86-SLOW-NEXT: .LBB5_4:
|
||||
; X86-SLOW-NEXT: movl %edx, %ecx
|
||||
; X86-SLOW-NEXT: movl $0, (%esp) # 4-byte Folded Spill
|
||||
; X86-SLOW-NEXT: .LBB5_6:
|
||||
; X86-SLOW-NEXT: movl %eax, %ecx
|
||||
; X86-SLOW-NEXT: shll %cl, %esi
|
||||
; X86-SLOW-NEXT: testb $32, %al
|
||||
; X86-SLOW-NEXT: movl {{[0-9]+}}(%esp), %edx
|
||||
; X86-SLOW-NEXT: jne .LBB5_7
|
||||
; X86-SLOW-NEXT: # %bb.8:
|
||||
; X86-SLOW-NEXT: testl %ebx, %ebx
|
||||
; X86-SLOW-NEXT: je .LBB5_8
|
||||
; X86-SLOW-NEXT: # %bb.7:
|
||||
; X86-SLOW-NEXT: movl (%esp), %eax # 4-byte Reload
|
||||
; X86-SLOW-NEXT: testl %ebx, %ebx
|
||||
; X86-SLOW-NEXT: jne .LBB5_10
|
||||
; X86-SLOW-NEXT: jmp .LBB5_11
|
||||
; X86-SLOW-NEXT: .LBB5_7:
|
||||
; X86-SLOW-NEXT: movl %esi, %eax
|
||||
; X86-SLOW-NEXT: xorl %esi, %esi
|
||||
; X86-SLOW-NEXT: testl %ebx, %ebx
|
||||
; X86-SLOW-NEXT: je .LBB5_11
|
||||
; X86-SLOW-NEXT: .LBB5_10:
|
||||
; X86-SLOW-NEXT: orl %ebp, %esi
|
||||
; X86-SLOW-NEXT: orl %edi, %eax
|
||||
; X86-SLOW-NEXT: movl %esi, {{[-0-9]+}}(%e{{[sb]}}p) # 4-byte Spill
|
||||
; X86-SLOW-NEXT: movl %eax, %edx
|
||||
; X86-SLOW-NEXT: .LBB5_11:
|
||||
; X86-SLOW-NEXT: movl {{[-0-9]+}}(%e{{[sb]}}p), %eax # 4-byte Reload
|
||||
; X86-SLOW-NEXT: orl %ebp, %eax
|
||||
; X86-SLOW-NEXT: orl %edi, %ecx
|
||||
; X86-SLOW-NEXT: movl %ecx, %edx
|
||||
; X86-SLOW-NEXT: .LBB5_8:
|
||||
; X86-SLOW-NEXT: addl $8, %esp
|
||||
; X86-SLOW-NEXT: popl %esi
|
||||
; X86-SLOW-NEXT: popl %edi
|
||||
@ -363,17 +324,14 @@ define i64 @var_shift_i64(i64 %x, i64 %y, i64 %z) nounwind {
|
||||
;
|
||||
; X64-SLOW-LABEL: var_shift_i64:
|
||||
; X64-SLOW: # %bb.0:
|
||||
; X64-SLOW-NEXT: movq %rdi, %rax
|
||||
; X64-SLOW-NEXT: movq %rsi, %rdi
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: shrq %cl, %rdi
|
||||
; X64-SLOW-NEXT: andb $63, %dl
|
||||
; X64-SLOW-NEXT: movl %edx, %ecx
|
||||
; X64-SLOW-NEXT: negb %cl
|
||||
; X64-SLOW-NEXT: movq %rdx, %rcx
|
||||
; X64-SLOW-NEXT: shrq %cl, %rsi
|
||||
; X64-SLOW-NEXT: leaq (%rdi,%rdi), %rax
|
||||
; X64-SLOW-NEXT: andb $63, %cl
|
||||
; X64-SLOW-NEXT: xorb $63, %cl
|
||||
; X64-SLOW-NEXT: # kill: def $cl killed $cl killed $rcx
|
||||
; X64-SLOW-NEXT: shlq %cl, %rax
|
||||
; X64-SLOW-NEXT: orq %rdi, %rax
|
||||
; X64-SLOW-NEXT: testb %dl, %dl
|
||||
; X64-SLOW-NEXT: cmoveq %rsi, %rax
|
||||
; X64-SLOW-NEXT: orq %rsi, %rax
|
||||
; X64-SLOW-NEXT: retq
|
||||
%tmp = tail call i64 @llvm.fshr.i64(i64 %x, i64 %y, i64 %z)
|
||||
ret i64 %tmp
|
||||
|
||||
Loading…
x
Reference in New Issue
Block a user