[CodeGen, Transforms] Use llvm::sort (NFC)

lib/CodeGen/AsmPrinter/DbgEntityHistoryCalculator.cpp

@@ -242,7 +242,7 @@ void DbgValueHistoryMap::trimLocationRanges(
       if (ReferenceCount[i] <= 0 && HistoryMapEntries[i].isClobber())
         ToRemove.push_back(i);
 
-    std::sort(ToRemove.begin(), ToRemove.end());
+    llvm::sort(ToRemove);
 
     // Build an offset map so we can update the EndIndex of the remaining
     // entries.

lib/CodeGen/FixupStatepointCallerSaved.cpp

@@ -301,7 +301,7 @@ public:
   void sortRegisters(SmallVectorImpl<Register> &Regs) {
     if (!FixupSCSExtendSlotSize)
       return;
-    llvm::sort(Regs.begin(), Regs.end(), [&](Register &A, Register &B) {
+    llvm::sort(Regs, [&](Register &A, Register &B) {
       return getRegisterSize(TRI, A) > getRegisterSize(TRI, B);
     });
   }

lib/CodeGen/LiveDebugValues/InstrRefBasedImpl.cpp

@@ -2282,7 +2282,7 @@ InstrRefBasedLDV::mlocJoin(MachineBasicBlock &MBB,
   auto Cmp = [&](const MachineBasicBlock *A, const MachineBasicBlock *B) {
     return BBToOrder.find(A)->second < BBToOrder.find(B)->second;
   };
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
 
   // Skip entry block.
   if (BlockOrders.size() == 0)
@@ -2649,7 +2649,7 @@ std::tuple<bool, bool> InstrRefBasedLDV::vlocJoin(
     return BBToOrder[A] < BBToOrder[B];
   };
 
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
 
   unsigned CurBlockRPONum = BBToOrder[&MBB];
 
@@ -2991,7 +2991,7 @@ void InstrRefBasedLDV::vlocDataflow(
   for (auto *MBB : BlocksToExplore)
     BlockOrders.push_back(const_cast<MachineBasicBlock *>(MBB));
 
-  llvm::sort(BlockOrders.begin(), BlockOrders.end(), Cmp);
+  llvm::sort(BlockOrders, Cmp);
   unsigned NumBlocks = BlockOrders.size();
 
   // Allocate some vectors for storing the live ins and live outs. Large.
@@ -3170,7 +3170,7 @@ void InstrRefBasedLDV::emitLocations(
   // in the middle.
   for (auto &P : TTracker->Transfers) {
     // Sort them according to appearance order.
-    llvm::sort(P.Insts.begin(), P.Insts.end(), OrderDbgValues);
+    llvm::sort(P.Insts, OrderDbgValues);
     // Insert either before or after the designated point...
     if (P.MBB) {
       MachineBasicBlock &MBB = *P.MBB;

lib/CodeGen/RDFLiveness.cpp

@@ -230,11 +230,11 @@ NodeList Liveness::getAllReachingDefs(RegisterRef RefRR,
     TmpBB.push_back(Bucket.first);
     if (Bucket.second.size() > 2)
       GetOrder(*Bucket.first);
-    llvm::sort(Bucket.second.begin(), Bucket.second.end(), Precedes);
+    llvm::sort(Bucket.second, Precedes);
   }
 
   // Sort the blocks with respect to dominance.
-  llvm::sort(TmpBB.begin(), TmpBB.end(),
+  llvm::sort(TmpBB,
              [this](auto A, auto B) { return MDT.properlyDominates(A, B); });
 
   std::vector<NodeId> TmpInst;

lib/CodeGen/RegAllocFast.cpp

@@ -1157,8 +1157,7 @@ void RegAllocFast::allocateInstruction(MachineInstr &MI) {
           }
         }
 
-        llvm::sort(DefOperandIndexes.begin(), DefOperandIndexes.end(),
-                   [&](uint16_t I0, uint16_t I1) {
+        llvm::sort(DefOperandIndexes, [&](uint16_t I0, uint16_t I1) {
           const MachineOperand &MO0 = MI.getOperand(I0);
           const MachineOperand &MO1 = MI.getOperand(I1);
           Register Reg0 = MO0.getReg();

lib/Transforms/Coroutines/CoroFrame.cpp

@@ -2003,11 +2003,10 @@ static void sinkSpillUsesAfterCoroBegin(Function &F,
 
   // Sort by dominance.
   SmallVector<Instruction *, 64> InsertionList(ToMove.begin(), ToMove.end());
-  std::sort(InsertionList.begin(), InsertionList.end(),
-            [&Dom](Instruction *A, Instruction *B) -> bool {
-              // If a dominates b it should preceed (<) b.
-              return Dom.dominates(A, B);
-            });
+  llvm::sort(InsertionList, [&Dom](Instruction *A, Instruction *B) -> bool {
+    // If a dominates b it should preceed (<) b.
+    return Dom.dominates(A, B);
+  });
 
   Instruction *InsertPt = CoroBegin->getNextNode();
   for (Instruction *Inst : InsertionList)

lib/Transforms/Instrumentation/SanitizerCoverage.cpp

@@ -795,7 +795,7 @@ void ModuleSanitizerCoverage::InjectTraceForSwitch(
           C = ConstantExpr::getCast(CastInst::ZExt, It.getCaseValue(), Int64Ty);
         Initializers.push_back(C);
       }
-      llvm::sort(Initializers.begin() + 2, Initializers.end(),
+      llvm::sort(drop_begin(Initializers, 2),
                  [](const Constant *A, const Constant *B) {
                    return cast<ConstantInt>(A)->getLimitedValue() <
                           cast<ConstantInt>(B)->getLimitedValue();

lib/Transforms/Scalar/ConstraintElimination.cpp

@@ -259,10 +259,9 @@ static bool eliminateConstraints(Function &F, DominatorTree &DT) {
   // come before blocks and conditions dominated by them. If a block and a
   // condition have the same numbers, the condition comes before the block, as
   // it holds on entry to the block.
-  sort(WorkList.begin(), WorkList.end(),
-       [](const ConstraintOrBlock &A, const ConstraintOrBlock &B) {
-         return std::tie(A.NumIn, A.IsBlock) < std::tie(B.NumIn, B.IsBlock);
-       });
+  sort(WorkList, [](const ConstraintOrBlock &A, const ConstraintOrBlock &B) {
+    return std::tie(A.NumIn, A.IsBlock) < std::tie(B.NumIn, B.IsBlock);
+  });
 
   // Finally, process ordered worklist and eliminate implied conditions.
   SmallVector<StackEntry, 16> DFSInStack;

lib/Transforms/Scalar/NewGVN.cpp

@@ -3372,10 +3372,9 @@ bool NewGVN::runGVN() {
   for (auto &B : RPOT) {
     auto *Node = DT->getNode(B);
     if (Node->getNumChildren() > 1)
-      llvm::sort(Node->begin(), Node->end(),
-                 [&](const DomTreeNode *A, const DomTreeNode *B) {
-                   return RPOOrdering[A] < RPOOrdering[B];
-                 });
+      llvm::sort(*Node, [&](const DomTreeNode *A, const DomTreeNode *B) {
+        return RPOOrdering[A] < RPOOrdering[B];
+      });
   }
 
   // Now a standard depth first ordering of the domtree is equivalent to RPO.