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RegAllocFast: Refactor PhysRegState usage; NFC
This is in preparation of https://reviews.llvm.org/D52010. llvm-svn: 346296
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@ -133,6 +133,8 @@ namespace {
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/// cannot be allocated.
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RegUnitSet UsedInInstr;
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void setPhysRegState(MCPhysReg PhysReg, unsigned NewState);
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/// Mark a physreg as used in this instruction.
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void markRegUsedInInstr(MCPhysReg PhysReg) {
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for (MCRegUnitIterator Units(PhysReg, TRI); Units.isValid(); ++Units)
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@ -229,6 +231,10 @@ char RegAllocFast::ID = 0;
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INITIALIZE_PASS(RegAllocFast, "regallocfast", "Fast Register Allocator", false,
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false)
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void RegAllocFast::setPhysRegState(MCPhysReg PhysReg, unsigned NewState) {
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PhysRegState[PhysReg] = NewState;
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}
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/// This allocates space for the specified virtual register to be held on the
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/// stack.
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int RegAllocFast::getStackSpaceFor(unsigned VirtReg) {
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@ -328,7 +334,7 @@ void RegAllocFast::killVirtReg(LiveRegMap::iterator LRI) {
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addKillFlag(*LRI);
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assert(PhysRegState[LRI->PhysReg] == LRI->VirtReg &&
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"Broken RegState mapping");
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PhysRegState[LRI->PhysReg] = regFree;
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setPhysRegState(LRI->PhysReg, regFree);
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// Erase from LiveVirtRegs unless we're spilling in bulk.
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if (!isBulkSpilling)
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LiveVirtRegs.erase(LRI);
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@ -438,12 +444,12 @@ void RegAllocFast::usePhysReg(MachineOperand &MO) {
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case regFree:
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if (TRI->isSuperRegister(PhysReg, Alias)) {
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// Leave the superregister in the working set.
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PhysRegState[Alias] = regFree;
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setPhysRegState(Alias, regFree);
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MO.getParent()->addRegisterKilled(Alias, TRI, true);
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return;
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}
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// Some other alias was in the working set - clear it.
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PhysRegState[Alias] = regDisabled;
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setPhysRegState(Alias, regDisabled);
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break;
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default:
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llvm_unreachable("Instruction uses an alias of an allocated register");
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@ -451,7 +457,7 @@ void RegAllocFast::usePhysReg(MachineOperand &MO) {
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}
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// All aliases are disabled, bring register into working set.
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PhysRegState[PhysReg] = regFree;
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setPhysRegState(PhysReg, regFree);
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MO.setIsKill();
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}
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@ -469,12 +475,12 @@ void RegAllocFast::definePhysReg(MachineBasicBlock::iterator MI,
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LLVM_FALLTHROUGH;
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case regFree:
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case regReserved:
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PhysRegState[PhysReg] = NewState;
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setPhysRegState(PhysReg, NewState);
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return;
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}
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// This is a disabled register, disable all aliases.
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PhysRegState[PhysReg] = NewState;
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setPhysRegState(PhysReg, NewState);
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for (MCRegAliasIterator AI(PhysReg, TRI, false); AI.isValid(); ++AI) {
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MCPhysReg Alias = *AI;
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switch (unsigned VirtReg = PhysRegState[Alias]) {
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@ -485,7 +491,7 @@ void RegAllocFast::definePhysReg(MachineBasicBlock::iterator MI,
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LLVM_FALLTHROUGH;
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case regFree:
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case regReserved:
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PhysRegState[Alias] = regDisabled;
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setPhysRegState(Alias, regDisabled);
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if (TRI->isSuperRegister(PhysReg, Alias))
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return;
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break;
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@ -547,11 +553,13 @@ unsigned RegAllocFast::calcSpillCost(MCPhysReg PhysReg) const {
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/// proper container for VirtReg now. The physical register must not be used
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/// for anything else when this is called.
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void RegAllocFast::assignVirtToPhysReg(LiveReg &LR, MCPhysReg PhysReg) {
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LLVM_DEBUG(dbgs() << "Assigning " << printReg(LR.VirtReg, TRI) << " to "
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unsigned VirtReg = LR.VirtReg;
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LLVM_DEBUG(dbgs() << "Assigning " << printReg(VirtReg, TRI) << " to "
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<< printReg(PhysReg, TRI) << "\n");
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PhysRegState[PhysReg] = LR.VirtReg;
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assert(!LR.PhysReg && "Already assigned a physreg");
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assert(LR.PhysReg == 0 && "Already assigned a physreg");
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assert(PhysReg != 0 && "Trying to assign no register");
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LR.PhysReg = PhysReg;
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setPhysRegState(PhysReg, VirtReg);
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}
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RegAllocFast::LiveRegMap::iterator
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