1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-02-01 05:01:59 +01:00

Mark FPB as a reserved register when needed.

llvm-svn: 205421
This commit is contained in:
Job Noorman 2014-04-02 13:13:56 +00:00
parent 0c7c337bd7
commit 69bfc47f3d
2 changed files with 15 additions and 1 deletions

View File

@ -88,8 +88,10 @@ BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
Reserved.set(MSP430::CGW);
// Mark frame pointer as reserved if needed.
if (TFI->hasFP(MF))
if (TFI->hasFP(MF)) {
Reserved.set(MSP430::FPB);
Reserved.set(MSP430::FPW);
}
return Reserved;
}

View File

@ -15,3 +15,15 @@ entry:
; CHECK: pop.w r4
ret void
}
; Due to FPB not being marked as reserved, the register allocator used to select
; r4 as the register for the "r" constraint below. This test verifies that this
; does not happen anymore. Note that the only reason an ISR is used here is that
; the register allocator selects r4 first instead of fifth in a normal function.
define msp430_intrcc void @fpb_alloced() #0 {
; CHECK_LABEL: fpb_alloced:
; CHECK-NOT: mov.b #0, r4
; CHECK: nop
call void asm sideeffect "nop", "r"(i8 0)
ret void
}