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Mark FPB as a reserved register when needed.
llvm-svn: 205421
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@ -88,8 +88,10 @@ BitVector MSP430RegisterInfo::getReservedRegs(const MachineFunction &MF) const {
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Reserved.set(MSP430::CGW);
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// Mark frame pointer as reserved if needed.
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if (TFI->hasFP(MF))
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if (TFI->hasFP(MF)) {
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Reserved.set(MSP430::FPB);
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Reserved.set(MSP430::FPW);
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}
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return Reserved;
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}
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@ -15,3 +15,15 @@ entry:
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; CHECK: pop.w r4
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ret void
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}
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; Due to FPB not being marked as reserved, the register allocator used to select
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; r4 as the register for the "r" constraint below. This test verifies that this
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; does not happen anymore. Note that the only reason an ISR is used here is that
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; the register allocator selects r4 first instead of fifth in a normal function.
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define msp430_intrcc void @fpb_alloced() #0 {
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; CHECK_LABEL: fpb_alloced:
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; CHECK-NOT: mov.b #0, r4
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; CHECK: nop
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call void asm sideeffect "nop", "r"(i8 0)
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ret void
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}
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