RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-19 11:02:59 +02:00
Code Issues Projects Releases Wiki Activity

[X86] Add 128-bit version of vbroadcasti32x2 to shuffle comment decoding.

Browse Source 
llvm-svn: 315395
This commit is contained in:
Craig Topper 2017-10-11 00:11:53 +00:00
parent 4d47a271be
commit 69e411cb84
3 changed files with 21 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

11
lib/Target/X86/InstPrinter/X86InstComments.cpp
View File

@ -293,6 +293,8 @@ static std::string getMaskName(const MCInst *MI, const char *DestName,
CASE_MASKZ_INS_COMMON(BROADCASTI32X4, , rm)
CASE_MASKZ_INS_COMMON(BROADCASTF32X8, , rm)
CASE_MASKZ_INS_COMMON(BROADCASTI32X8, , rm)
CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, r)
CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z128, m)
CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_MASKZ_INS_COMMON(BROADCASTI32X2, Z256, r)
CASE_MASKZ_INS_COMMON(BROADCASTF32X2, Z256, m)
@ -382,6 +384,8 @@ static std::string getMaskName(const MCInst *MI, const char *DestName,
CASE_MASK_INS_COMMON(BROADCASTI32X4, , rm)
CASE_MASK_INS_COMMON(BROADCASTF32X8, , rm)
CASE_MASK_INS_COMMON(BROADCASTI32X8, , rm)
CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, r)
CASE_MASK_INS_COMMON(BROADCASTI32X2, Z128, m)
CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_MASK_INS_COMMON(BROADCASTI32X2, Z256, r)
CASE_MASK_INS_COMMON(BROADCASTF32X2, Z256, m)
@ -1090,6 +1094,13 @@ bool llvm::EmitAnyX86InstComments(const MCInst *MI, raw_ostream &OS,
DecodeSubVectorBroadcast(MVT::v16f32, MVT::v8f32, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, r)
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());
LLVM_FALLTHROUGH;
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z128, m)
DecodeSubVectorBroadcast(MVT::v4f32, MVT::v2f32, ShuffleMask);
DestName = getRegName(MI->getOperand(0).getReg());
break;
CASE_AVX512_INS_COMMON(BROADCASTF32X2, Z256, r)
CASE_AVX512_INS_COMMON(BROADCASTI32X2, Z256, r)
Src1Name = getRegName(MI->getOperand(NumOperands - 1).getReg());

16
test/CodeGen/X86/avx512-shuffles/broadcast-vector-int.ll
View File

@ -16,7 +16,7 @@ define <4 x i32> @test_masked_2xi32_to_4xi32_mask0(<4 x i32> %vec, <4 x i32> %de
; CHECK: # BB#0:
; CHECK-NEXT: movb $4, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@ -29,7 +29,7 @@ define <4 x i32> @test_masked_z_2xi32_to_4xi32_mask0(<4 x i32> %vec) {
; CHECK: # BB#0:
; CHECK-NEXT: movb $4, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 0, i1 0, i1 1, i1 0>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@ -40,7 +40,7 @@ define <4 x i32> @test_masked_2xi32_to_4xi32_mask1(<4 x i32> %vec, <4 x i32> %de
; CHECK: # BB#0:
; CHECK-NEXT: movb $13, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@ -53,7 +53,7 @@ define <4 x i32> @test_masked_z_2xi32_to_4xi32_mask1(<4 x i32> %vec) {
; CHECK: # BB#0:
; CHECK-NEXT: movb $13, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 1, i1 0, i1 1, i1 1>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@ -64,7 +64,7 @@ define <4 x i32> @test_masked_2xi32_to_4xi32_mask2(<4 x i32> %vec, <4 x i32> %de
; CHECK: # BB#0:
; CHECK-NEXT: movb $5, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@ -77,7 +77,7 @@ define <4 x i32> @test_masked_z_2xi32_to_4xi32_mask2(<4 x i32> %vec) {
; CHECK: # BB#0:
; CHECK-NEXT: movb $5, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 1, i1 0, i1 1, i1 0>, <4 x i32> %shuf, <4 x i32> zeroinitializer
@ -88,7 +88,7 @@ define <4 x i32> @test_masked_2xi32_to_4xi32_mask3(<4 x i32> %vec, <4 x i32> %de
; CHECK: # BB#0:
; CHECK-NEXT: movb $14, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@ -101,7 +101,7 @@ define <4 x i32> @test_masked_z_2xi32_to_4xi32_mask3(<4 x i32> %vec) {
; CHECK: # BB#0:
; CHECK-NEXT: movb $14, %al
; CHECK-NEXT: kmovw %eax, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%res = select <4 x i1> <i1 0, i1 1, i1 1, i1 1>, <4 x i32> %shuf, <4 x i32> zeroinitializer

4
test/CodeGen/X86/vector-shuffle-masked.ll
View File

@ -1713,7 +1713,7 @@ define <4 x i32> @test_broadcasti32x2_v4i32(<4 x i32> %vec, <4 x i32> %passthru,
; CHECK-LABEL: test_broadcasti32x2_v4i32:
; CHECK: # BB#0:
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm1 {%k1}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm1 {%k1} = xmm0[0,1,0,1]
; CHECK-NEXT: vmovdqa %xmm1, %xmm0
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
@ -1727,7 +1727,7 @@ define <4 x i32> @test_broadcasti32x2_v4i32_z(<4 x i32> %vec, i8 %mask) {
; CHECK-LABEL: test_broadcasti32x2_v4i32_z:
; CHECK: # BB#0:
; CHECK-NEXT: kmovw %edi, %k1
; CHECK-NEXT: vbroadcasti32x2 %xmm0, %xmm0 {%k1} {z}
; CHECK-NEXT: vbroadcasti32x2 {{.*#+}} xmm0 {%k1} {z} = xmm0[0,1,0,1]
; CHECK-NEXT: retq
%shuf = shufflevector <4 x i32> %vec, <4 x i32> undef, <4 x i32> <i32 0, i32 1, i32 0, i32 1>
%mask.cast = bitcast i8 %mask to <8 x i1>