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Factor out the code to scan an instruction's operands into a
helper function. llvm-svn: 55007
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parent
7a23fc0fb0
commit
69eb9fb38e
@ -56,6 +56,40 @@ struct OperandsSignature {
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bool empty() const { return Operands.empty(); }
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/// initialize - Examine the given pattern and initialize the contents
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/// of the Operands array accordingly. Return true if all the operands
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/// are supported, false otherwise.
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///
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bool initialize(TreePatternNode *InstPatNode,
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const CodeGenTarget &Target,
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MVT::SimpleValueType VT) {
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for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
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TreePatternNode *Op = InstPatNode->getChild(i);
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if (!Op->isLeaf())
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return false;
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// For now, filter out any operand with a predicate.
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if (!Op->getPredicateFn().empty())
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return false;
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DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
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if (!OpDI)
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return false;
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Record *OpLeafRec = OpDI->getDef();
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// For now, only accept register operands.
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if (!OpLeafRec->isSubClassOf("RegisterClass"))
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return false;
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// For now, require the register operands' register classes to all
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// be the same.
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const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
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if (!RC)
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return false;
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// For now, all the operands must have the same type.
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if (Op->getTypeNum(0) != VT)
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return false;
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Operands.push_back("r");
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}
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return true;
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}
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void PrintParameters(std::ostream &OS) const {
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for (unsigned i = 0, e = Operands.size(); i != e; ++i) {
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if (Operands[i] == "r") {
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@ -196,30 +230,8 @@ void FastISelEmitter::run(std::ostream &OS) {
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// Check all the operands.
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OperandsSignature Operands;
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for (unsigned i = 0, e = InstPatNode->getNumChildren(); i != e; ++i) {
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TreePatternNode *Op = InstPatNode->getChild(i);
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if (!Op->isLeaf())
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goto continue_label;
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// For now, filter out any operand with a predicate.
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if (!Op->getPredicateFn().empty())
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goto continue_label;
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DefInit *OpDI = dynamic_cast<DefInit*>(Op->getLeafValue());
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if (!OpDI)
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goto continue_label;
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Record *OpLeafRec = OpDI->getDef();
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// For now, only accept register operands.
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if (!OpLeafRec->isSubClassOf("RegisterClass"))
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goto continue_label;
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// For now, require the register operands' register classes to all
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// be the same.
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const CodeGenRegisterClass *RC = &Target.getRegisterClass(OpLeafRec);
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if (!RC)
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goto continue_label;
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// For now, all the operands must have the same type.
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if (Op->getTypeNum(0) != VT)
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goto continue_label;
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Operands.Operands.push_back("r");
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}
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if (!Operands.initialize(InstPatNode, Target, VT))
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continue;
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// If it's not a known signature, ignore it.
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if (!SimplePatterns.count(Operands))
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@ -233,8 +245,6 @@ void FastISelEmitter::run(std::ostream &OS) {
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};
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SimplePatterns[Operands][OpcodeName][VT] = Memo;
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}
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continue_label:;
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}
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OS << "#include \"llvm/CodeGen/FastISel.h\"\n";
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