RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2025-01-31 12:41:49 +01:00
Code Issues Projects Releases Wiki Activity

[mips] Pass "xgot" flag as a subtarget feature

Browse Source 
We need "xgot" flag in the MipsAsmParser to implement correct expansion
of some pseudo instructions in case of using 32-bit GOT (XGOT).
MipsAsmParser does not have reference to MipsSubtarget but has a
reference to "feature bit set".

llvm-svn: 372220
This commit is contained in:
Simon Atanasyan 2019-09-18 12:24:57 +00:00
parent 1124aeadf7
commit 6a1f00145f
6 changed files with 27 additions and 18 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

3
lib/Target/Mips/Mips.td
View File

@ -209,6 +209,9 @@ def FeatureMT : SubtargetFeature<"mt", "HasMT", "true", "Mips MT ASE">;
def FeatureLongCalls : SubtargetFeature<"long-calls", "UseLongCalls", "true",
"Disable use of the jal instruction">;
def FeatureXGOT
: SubtargetFeature<"xgot", "UseXGOT", "true", "Assume 32-bit GOT">;
def FeatureUseIndirectJumpsHazard : SubtargetFeature<"use-indirect-jump-hazard",
"UseIndirectJumpsHazard",
"true", "Use indirect jump"

15
lib/Target/Mips/MipsISelLowering.cpp
View File

@ -82,10 +82,6 @@ using namespace llvm;
STATISTIC(NumTailCalls, "Number of tail calls");
static cl::opt<bool>
LargeGOT("mxgot", cl::Hidden,
cl::desc("MIPS: Enable GOT larger than 64k."), cl::init(false));
static cl::opt<bool>
NoZeroDivCheck("mno-check-zero-division", cl::Hidden,
cl::desc("MIPS: Don't trap on integer division by zero."),
@ -554,8 +550,9 @@ MipsTargetLowering::createFastISel(FunctionLoweringInfo &funcInfo,
!Subtarget.inMicroMipsMode();
// Disable if either of the following is true:
// We do not generate PIC, the ABI is not O32, LargeGOT is being used.
if (!TM.isPositionIndependent() || !TM.getABI().IsO32() || LargeGOT)
// We do not generate PIC, the ABI is not O32, XGOT is being used.
if (!TM.isPositionIndependent() || !TM.getABI().IsO32() ||
Subtarget.useXGOT())
UseFastISel = false;
return UseFastISel ? Mips::createFastISel(funcInfo, libInfo) : nullptr;
@ -1989,7 +1986,7 @@ SDValue MipsTargetLowering::lowerGlobalAddress(SDValue Op,
if (GV->hasLocalLinkage())
return getAddrLocal(N, SDLoc(N), Ty, DAG, ABI.IsN32() || ABI.IsN64());
if (LargeGOT)
if (Subtarget.useXGOT())
return getAddrGlobalLargeGOT(
N, SDLoc(N), Ty, DAG, MipsII::MO_GOT_HI16, MipsII::MO_GOT_LO16,
DAG.getEntryNode(),
@ -3272,7 +3269,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (InternalLinkage)
Callee = getAddrLocal(G, DL, Ty, DAG, ABI.IsN32() || ABI.IsN64());
else if (LargeGOT) {
else if (Subtarget.useXGOT()) {
Callee = getAddrGlobalLargeGOT(G, DL, Ty, DAG, MipsII::MO_CALL_HI16,
MipsII::MO_CALL_LO16, Chain,
FuncInfo->callPtrInfo(Val));
@ -3294,7 +3291,7 @@ MipsTargetLowering::LowerCall(TargetLowering::CallLoweringInfo &CLI,
if (!IsPIC) // static
Callee = DAG.getTargetExternalSymbol(
Sym, getPointerTy(DAG.getDataLayout()), MipsII::MO_NO_FLAG);
else if (LargeGOT) {
else if (Subtarget.useXGOT()) {
Callee = getAddrGlobalLargeGOT(S, DL, Ty, DAG, MipsII::MO_CALL_HI16,
MipsII::MO_CALL_LO16, Chain,
FuncInfo->callPtrInfo(Sym));

5
lib/Target/Mips/MipsSubtarget.h
View File

@ -189,6 +189,9 @@ class MipsSubtarget : public MipsGenSubtargetInfo {
// Disable use of the `jal` instruction.
bool UseLongCalls = false;
// Assume 32-bit GOT.
bool UseXGOT = false;
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment;
@ -323,6 +326,8 @@ public:
bool useLongCalls() const { return UseLongCalls; }
bool useXGOT() const { return UseXGOT; }
bool enableLongBranchPass() const {
return hasStandardEncoding() || inMicroMipsMode() || allowMixed16_32();
}

6
test/CodeGen/Mips/address-selection.ll
View File

@ -1,8 +1,10 @@
; RUN: llc -march=mips < %s -debug 2>&1 | FileCheck %s --check-prefix=MIPS
; RUN: llc -march=mips -relocation-model=pic -mxgot < %s -debug 2>&1 | FileCheck %s --check-prefix=MIPS-XGOT
; RUN: llc -march=mips -relocation-model=pic -mattr=+xgot < %s \
; RUN: -debug 2>&1 | FileCheck %s --check-prefix=MIPS-XGOT
; RUN: llc -march=mips -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM
; RUN: llc -march=mips -relocation-model=pic -mxgot -mattr=+micromips < %s -debug 2>&1 | FileCheck %s --check-prefix=MM-XGOT
; RUN: llc -march=mips -relocation-model=pic -mattr=+xgot,+micromips < %s \
; RUN: -debug 2>&1 | FileCheck %s --check-prefix=MM-XGOT
; REQUIRES: asserts

14
test/CodeGen/Mips/biggot.ll
View File

@ -1,9 +1,11 @@
; RUN: llc -march=mipsel -mxgot -relocation-model=pic < %s | FileCheck %s -check-prefix=O32
; RUN: llc -march=mips64el -mcpu=mips64r2 -mxgot -relocation-model=pic < %s | \
; RUN: FileCheck %s -check-prefix=N64
; RUN: llc -march=mipsel -mxgot -relocation-model=pic -fast-isel < %s | FileCheck %s -check-prefix=O32
; RUN: llc -march=mips64el -mcpu=mips64r2 -mxgot -relocation-model=pic -fast-isel < %s | \
; RUN: FileCheck %s -check-prefix=N64
; RUN: llc -march=mipsel -mattr=+xgot \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=O32
; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+xgot \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=N64
; RUN: llc -march=mipsel -mattr=+xgot -fast-isel \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=O32
; RUN: llc -march=mips64el -mcpu=mips64r2 -mattr=+xgot -fast-isel \
; RUN: -relocation-model=pic < %s | FileCheck %s -check-prefix=N64
@v0 = external global i32

2
test/CodeGen/Mips/mirparser/target-flags-pic-mxgot-tls.mir
View File

@ -1,5 +1,5 @@
# RUN: llc -march=mips64 -target-abi n64 -start-before=finalize-isel \
# RUN: -stop-after=finalize-isel -relocation-model=pic -mxgot \
# RUN: -stop-after=finalize-isel -relocation-model=pic -mattr=+xgot \
# RUN: -o /dev/null %s
# A simple test to show that we can parse the target specific flags: gpoff-hi,