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https://github.com/RPCS3/llvm-mirror.git
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[globalisel][tablegen] Compute available feature bits correctly.
Summary: Predicate<> now has a field to indicate how often it must be recomputed. Currently, there are two frequencies, per-module (RecomputePerFunction==0) and per-function (RecomputePerFunction==1). Per-function predicates are currently recomputed more frequently than necessary since the only predicate in this category is cheap to test. Per-module predicates are now computed in getSubtargetImpl() while per-function predicates are computed in selectImpl(). Tablegen now manages the PredicateBitset internally. It should only be necessary to add the required includes. Also fixed a problem revealed by the test case where constrainSelectedInstRegOperands() would attempt to tie operands that BuildMI had already tied. Reviewers: ab, qcolombet, t.p.northover, rovka, aditya_nandakumar Reviewed By: rovka Subscribers: kristof.beyls, igorb, llvm-commits Differential Revision: https://reviews.llvm.org/D32491 llvm-svn: 301750
This commit is contained in:
Daniel Sanders
parent
4493f8350b
commit
6ad3513c78
@ -61,9 +61,6 @@ class InstructionSelector {
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public:
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virtual ~InstructionSelector() {}
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/// This is executed before selecting a function.
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virtual void beginFunction(const MachineFunction &MF) {}
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/// Select the (possibly generic) instruction \p I to only use target-specific
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/// opcodes. It is OK to insert multiple instructions, but they cannot be
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/// generic pre-isel instructions.
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@ -530,6 +530,12 @@ class Predicate<string cond> {
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/// PredicateName - User-level name to use for the predicate. Mainly for use
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/// in diagnostics such as missing feature errors in the asm matcher.
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string PredicateName = "";
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/// Setting this to '1' indicates that the predicate must be recomputed on
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/// every function change. Most predicates can leave this at '0'.
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///
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/// Ignored by SelectionDAG, it always recomputes the predicate on every use.
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bit RecomputePerFunction = 0;
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}
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/// NoHonorSignDependentRounding - This predicate is true if support for
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@ -58,10 +58,11 @@ bool InstructionSelector::constrainSelectedInstRegOperands(
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MO.setReg(constrainOperandRegClass(MF, TRI, MRI, TII, RBI, I, I.getDesc(),
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Reg, OpI));
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// Tie uses to defs as indicated in MCInstrDesc.
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// Tie uses to defs as indicated in MCInstrDesc if this hasn't already been
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// done.
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if (MO.isUse()) {
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int DefIdx = I.getDesc().getOperandConstraint(OpI, MCOI::TIED_TO);
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if (DefIdx != -1)
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if (DefIdx != -1 && !I.isRegTiedToUseOperand(DefIdx))
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I.tieOperands(DefIdx, OpI);
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}
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}
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@ -314,8 +314,8 @@ def AArch64umaxv : SDNode<"AArch64ISD::UMAXV", SDT_AArch64UnaryVec>;
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// AArch64 Instruction Predicate Definitions.
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def IsDarwin : Predicate<"Subtarget->isTargetDarwin()">;
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def IsNotDarwin: Predicate<"!Subtarget->isTargetDarwin()">;
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def ForCodeSize : Predicate<"ForCodeSize">;
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def NotForCodeSize : Predicate<"!ForCodeSize">;
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def ForCodeSize : Predicate<"Subtarget->getForCodeSize()">;
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def NotForCodeSize : Predicate<"!Subtarget->getForCodeSize()">;
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include "AArch64InstrFormats.td"
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@ -51,7 +51,6 @@ public:
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const AArch64Subtarget &STI,
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const AArch64RegisterBankInfo &RBI);
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void beginFunction(const MachineFunction &MF) override;
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bool select(MachineInstr &I) const override;
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private:
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@ -74,12 +73,10 @@ private:
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const AArch64InstrInfo &TII;
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const AArch64RegisterInfo &TRI;
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const AArch64RegisterBankInfo &RBI;
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bool ForCodeSize;
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PredicateBitset AvailableFeatures;
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PredicateBitset
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computeAvailableFeatures(const MachineFunction *MF,
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const AArch64Subtarget *Subtarget) const;
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#define GET_GLOBALISEL_PREDICATES_DECL
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#include "AArch64GenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_DECL
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// We declare the temporaries used by selectImpl() in the class to minimize the
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// cost of constructing placeholder values.
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@ -98,7 +95,10 @@ AArch64InstructionSelector::AArch64InstructionSelector(
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const AArch64TargetMachine &TM, const AArch64Subtarget &STI,
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const AArch64RegisterBankInfo &RBI)
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: InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
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TRI(*STI.getRegisterInfo()), RBI(RBI), ForCodeSize(), AvailableFeatures()
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TRI(*STI.getRegisterInfo()), RBI(RBI),
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#define GET_GLOBALISEL_PREDICATES_INIT
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#include "AArch64GenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_INIT
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#define GET_GLOBALISEL_TEMPORARIES_INIT
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#include "AArch64GenGlobalISel.inc"
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#undef GET_GLOBALISEL_TEMPORARIES_INIT
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@ -577,12 +577,6 @@ bool AArch64InstructionSelector::selectVaStartDarwin(
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return true;
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}
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void AArch64InstructionSelector::beginFunction(
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const MachineFunction &MF) {
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ForCodeSize = MF.getFunction()->optForSize();
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AvailableFeatures = computeAvailableFeatures(&MF, &STI);
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}
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bool AArch64InstructionSelector::select(MachineInstr &I) const {
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assert(I.getParent() && "Instruction should be in a basic block!");
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assert(I.getParent()->getParent() && "Instruction should be in a function!");
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@ -113,11 +113,12 @@ void AArch64Subtarget::initializeProperties() {
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AArch64Subtarget::AArch64Subtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS,
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const TargetMachine &TM, bool LittleEndian)
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const TargetMachine &TM, bool LittleEndian,
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bool ForCodeSize)
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: AArch64GenSubtargetInfo(TT, CPU, FS), ReserveX18(TT.isOSDarwin()),
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IsLittle(LittleEndian), TargetTriple(TT), FrameLowering(),
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InstrInfo(initializeSubtargetDependencies(FS, CPU)), TSInfo(),
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TLInfo(TM, *this), GISel() {}
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TLInfo(TM, *this), GISel(), ForCodeSize(ForCodeSize) {}
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const CallLowering *AArch64Subtarget::getCallLowering() const {
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assert(GISel && "Access to GlobalISel APIs not set");
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@ -124,6 +124,8 @@ protected:
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/// an optional library.
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std::unique_ptr<GISelAccessor> GISel;
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bool ForCodeSize;
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private:
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/// initializeSubtargetDependencies - Initializes using CPUString and the
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/// passed in feature string so that we can use initializer lists for
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@ -139,7 +141,7 @@ public:
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/// of the specified triple.
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AArch64Subtarget(const Triple &TT, const std::string &CPU,
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const std::string &FS, const TargetMachine &TM,
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bool LittleEndian);
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bool LittleEndian, bool ForCodeSize);
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/// This object will take onwership of \p GISelAccessor.
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void setGISelAccessor(GISelAccessor &GISel) {
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@ -262,6 +264,8 @@ public:
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}
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}
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bool getForCodeSize() const { return ForCodeSize; }
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/// ParseSubtargetFeatures - Parses features string setting specified
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/// subtarget options. Definition of function is auto generated by tblgen.
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void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
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@ -255,6 +255,7 @@ const AArch64Subtarget *
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AArch64TargetMachine::getSubtargetImpl(const Function &F) const {
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Attribute CPUAttr = F.getFnAttribute("target-cpu");
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Attribute FSAttr = F.getFnAttribute("target-features");
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bool ForCodeSize = F.optForSize();
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std::string CPU = !CPUAttr.hasAttribute(Attribute::None)
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? CPUAttr.getValueAsString().str()
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@ -262,15 +263,17 @@ AArch64TargetMachine::getSubtargetImpl(const Function &F) const {
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std::string FS = !FSAttr.hasAttribute(Attribute::None)
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? FSAttr.getValueAsString().str()
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: TargetFS;
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std::string ForCodeSizeStr =
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std::string(ForCodeSize ? "+" : "-") + "forcodesize";
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auto &I = SubtargetMap[CPU + FS];
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auto &I = SubtargetMap[CPU + FS + ForCodeSizeStr];
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if (!I) {
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// This needs to be done before we create a new subtarget since any
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// creation will depend on the TM and the code generation flags on the
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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I = llvm::make_unique<AArch64Subtarget>(TargetTriple, CPU, FS, *this,
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isLittle);
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isLittle, ForCodeSize);
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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GISelAccessor *GISel = new GISelAccessor();
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#else
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@ -877,7 +877,9 @@ def In32BitMode : Predicate<"Subtarget->is32Bit()">,
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def IsWin64 : Predicate<"Subtarget->isTargetWin64()">;
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def NotWin64 : Predicate<"!Subtarget->isTargetWin64()">;
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def NotWin64WithoutFP : Predicate<"!Subtarget->isTargetWin64() ||"
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"Subtarget->getFrameLowering()->hasFP(*MF)">;
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"Subtarget->getFrameLowering()->hasFP(*MF)"> {
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let RecomputePerFunction = 1;
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}
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def IsPS4 : Predicate<"Subtarget->isTargetPS4()">;
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def NotPS4 : Predicate<"!Subtarget->isTargetPS4()">;
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def IsNaCl : Predicate<"Subtarget->isTargetNaCl()">;
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@ -887,9 +889,9 @@ def KernelCode : Predicate<"TM.getCodeModel() == CodeModel::Kernel">;
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def NearData : Predicate<"TM.getCodeModel() == CodeModel::Small ||"
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"TM.getCodeModel() == CodeModel::Kernel">;
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def IsNotPIC : Predicate<"!TM.isPositionIndependent()">;
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def OptForSize : Predicate<"OptForSize">;
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def OptForMinSize : Predicate<"OptForMinSize">;
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def OptForSpeed : Predicate<"!OptForSize">;
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def OptForSize : Predicate<"Subtarget->getOptForSize()">;
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def OptForMinSize : Predicate<"Subtarget->getOptForMinSize()">;
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def OptForSpeed : Predicate<"!Subtarget->getOptForSize()">;
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def FastBTMem : Predicate<"!Subtarget->isBTMemSlow()">;
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def CallImmAddr : Predicate<"Subtarget->isLegalToCallImmediateAddr()">;
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def FavorMemIndirectCall : Predicate<"!Subtarget->callRegIndirect()">;
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@ -48,7 +48,6 @@ public:
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X86InstructionSelector(const X86TargetMachine &TM, const X86Subtarget &STI,
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const X86RegisterBankInfo &RBI);
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void beginFunction(const MachineFunction &MF) override;
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bool select(MachineInstr &I) const override;
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private:
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@ -80,12 +79,10 @@ private:
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const X86InstrInfo &TII;
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const X86RegisterInfo &TRI;
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const X86RegisterBankInfo &RBI;
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bool OptForSize;
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bool OptForMinSize;
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PredicateBitset AvailableFeatures;
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PredicateBitset computeAvailableFeatures(const MachineFunction *MF,
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const X86Subtarget *Subtarget) const;
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#define GET_GLOBALISEL_PREDICATES_DECL
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#include "X86GenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_DECL
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#define GET_GLOBALISEL_TEMPORARIES_DECL
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#include "X86GenGlobalISel.inc"
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@ -102,8 +99,10 @@ X86InstructionSelector::X86InstructionSelector(const X86TargetMachine &TM,
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const X86Subtarget &STI,
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const X86RegisterBankInfo &RBI)
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: InstructionSelector(), TM(TM), STI(STI), TII(*STI.getInstrInfo()),
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TRI(*STI.getRegisterInfo()), RBI(RBI), OptForSize(false),
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OptForMinSize(false), AvailableFeatures()
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TRI(*STI.getRegisterInfo()), RBI(RBI),
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#define GET_GLOBALISEL_PREDICATES_INIT
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#include "X86GenGlobalISel.inc"
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#undef GET_GLOBALISEL_PREDICATES_INIT
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#define GET_GLOBALISEL_TEMPORARIES_INIT
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#include "X86GenGlobalISel.inc"
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#undef GET_GLOBALISEL_TEMPORARIES_INIT
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@ -206,12 +205,6 @@ static bool selectCopy(MachineInstr &I, const TargetInstrInfo &TII,
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return true;
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}
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void X86InstructionSelector::beginFunction(const MachineFunction &MF) {
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OptForSize = MF.getFunction()->optForSize();
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OptForMinSize = MF.getFunction()->optForMinSize();
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AvailableFeatures = computeAvailableFeatures(&MF, &STI);
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}
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bool X86InstructionSelector::select(MachineInstr &I) const {
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assert(I.getParent() && "Instruction should be in a basic block!");
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assert(I.getParent()->getParent() && "Instruction should be in a function!");
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@ -326,7 +326,8 @@ X86Subtarget &X86Subtarget::initializeSubtargetDependencies(StringRef CPU,
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X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
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const X86TargetMachine &TM,
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unsigned StackAlignOverride)
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unsigned StackAlignOverride, bool OptForSize,
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bool OptForMinSize)
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: X86GenSubtargetInfo(TT, CPU, FS), X86ProcFamily(Others),
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PICStyle(PICStyles::None), TM(TM), TargetTriple(TT),
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StackAlignOverride(StackAlignOverride),
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@ -335,8 +336,9 @@ X86Subtarget::X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
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TargetTriple.getEnvironment() != Triple::CODE16),
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In16BitMode(TargetTriple.getArch() == Triple::x86 &&
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TargetTriple.getEnvironment() == Triple::CODE16),
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InstrInfo(initializeSubtargetDependencies(CPU, FS)),
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TLInfo(TM, *this), FrameLowering(*this, getStackAlignment()) {
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InstrInfo(initializeSubtargetDependencies(CPU, FS)), TLInfo(TM, *this),
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FrameLowering(*this, getStackAlignment()), OptForSize(OptForSize),
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OptForMinSize(OptForMinSize) {
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// Determine the PICStyle based on the target selected.
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if (!isPositionIndependent())
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setPICStyle(PICStyles::None);
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@ -328,12 +328,16 @@ private:
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X86TargetLowering TLInfo;
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X86FrameLowering FrameLowering;
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bool OptForSize;
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bool OptForMinSize;
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public:
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/// This constructor initializes the data members to match that
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/// of the specified triple.
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///
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X86Subtarget(const Triple &TT, StringRef CPU, StringRef FS,
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const X86TargetMachine &TM, unsigned StackAlignOverride);
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const X86TargetMachine &TM, unsigned StackAlignOverride,
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bool OptForSize, bool OptForMinSize);
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/// This object will take onwership of \p GISelAccessor.
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void setGISelAccessor(GISelAccessor &GISel) { this->GISel.reset(&GISel); }
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@ -499,6 +503,9 @@ public:
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bool isSLM() const { return X86ProcFamily == IntelSLM; }
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bool useSoftFloat() const { return UseSoftFloat; }
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bool getOptForSize() const { return OptForSize; }
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bool getOptForMinSize() const { return OptForMinSize; }
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/// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
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/// no-sse2). There isn't any reason to disable it if the target processor
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/// supports it.
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@ -268,6 +268,12 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
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FS = Key.substr(CPU.size());
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bool OptForSize = F.optForSize();
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bool OptForMinSize = F.optForMinSize();
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Key += std::string(OptForSize ? "+" : "-") + "optforsize";
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Key += std::string(OptForMinSize ? "+" : "-") + "optforminsize";
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auto &I = SubtargetMap[Key];
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if (!I) {
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// This needs to be done before we create a new subtarget since any
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@ -275,7 +281,8 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
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// function that reside in TargetOptions.
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resetTargetOptions(F);
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I = llvm::make_unique<X86Subtarget>(TargetTriple, CPU, FS, *this,
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Options.StackAlignmentOverride);
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Options.StackAlignmentOverride,
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OptForSize, OptForMinSize);
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#ifndef LLVM_BUILD_GLOBAL_ISEL
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GISelAccessor *GISel = new GISelAccessor();
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#else
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@ -286,7 +293,8 @@ X86TargetMachine::getSubtargetImpl(const Function &F) const {
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auto *RBI = new X86RegisterBankInfo(*I->getRegisterInfo());
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GISel->RegBankInfo.reset(RBI);
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GISel->InstSelector.reset(createX86InstructionSelector(*this, *I, *RBI));
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GISel->InstSelector.reset(createX86InstructionSelector(
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*this, *I, *RBI));
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#endif
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I->setGISelAccessor(*GISel);
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}
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37
test/CodeGen/X86/GlobalISel/select-inc.mir
Normal file
37
test/CodeGen/X86/GlobalISel/select-inc.mir
Normal file
@ -0,0 +1,37 @@
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# RUN: llc -mtriple=x86_64-linux-gnu -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,INC
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# RUN: llc -mtriple=x86_64-linux-gnu -mattr=+slow-incdec -global-isel -run-pass=instruction-select -verify-machineinstrs %s -o - | FileCheck %s --check-prefixes=ALL,ADD
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--- |
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define i8 @test_add_i8(i8 %arg1) {
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%ret = add i8 %arg1, 1
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ret i8 %ret
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}
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...
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---
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name: test_add_i8
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legalized: true
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regBankSelected: true
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# ALL: registers:
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# ALL-NEXT: - { id: 0, class: gr8 }
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# INC-NEXT: - { id: 1, class: gpr }
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# ADD-NEXT: - { id: 1, class: gr8 }
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# ALL-NEXT: - { id: 2, class: gr8 }
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registers:
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- { id: 0, class: gpr }
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- { id: 1, class: gpr }
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- { id: 2, class: gpr }
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# ALL: %0 = COPY %al
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# INC-NEXT: %2 = INC8r %0
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# ADD-NEXT: %1 = MOV8ri 1
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# ADD-NEXT: %2 = ADD8rr %0, %1
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body: |
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bb.1 (%ir-block.0):
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liveins: %al
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%0(s8) = COPY %al
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%1(s8) = G_CONSTANT i8 1
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%2(s8) = G_ADD %0, %1
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%al = COPY %2(s8)
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...
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@ -32,22 +32,25 @@ def m1Z : OperandWithDefaultOps <i32, (ops (i32 -1), R0)>;
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def HasA : Predicate<"Subtarget->hasA()">;
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def HasB : Predicate<"Subtarget->hasB()">;
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def HasC : Predicate<"Subtarget->hasC()"> { let RecomputePerFunction = 1; }
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//===- Test the function boilerplate. -------------------------------------===//
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// CHECK-LABEL: enum SubtargetFeatureBits : uint8_t {
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// CHECK-NEXT: Feature_HasABit = 0,
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// CHECK-NEXT: Feature_HasBBit = 1,
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// CHECK-NEXT: Feature_HasCBit = 2,
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// CHECK-NEXT: };
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||||
// CHECK-LABEL: static const char *SubtargetFeatureNames[] = {
|
||||
// CHECK-NEXT: "Feature_HasA",
|
||||
// CHECK-NEXT: "Feature_HasB",
|
||||
// CHECK-NEXT: "Feature_HasC",
|
||||
// CHECK-NEXT: nullptr
|
||||
// CHECK-NEXT: };
|
||||
|
||||
// CHECK-LABEL: PredicateBitset MyTargetInstructionSelector::
|
||||
// CHECK-NEXT: computeAvailableFeatures(const MachineFunction *MF, const MyTargetSubtarget *Subtarget) const {
|
||||
// CHECK-NEXT: computeAvailableModuleFeatures(const MyTargetSubtarget *Subtarget) const {
|
||||
// CHECK-NEXT: PredicateBitset Features;
|
||||
// CHECK-NEXT: if (Subtarget->hasA())
|
||||
// CHECK-NEXT: Features[Feature_HasABit] = 1;
|
||||
@ -56,6 +59,14 @@ def HasB : Predicate<"Subtarget->hasB()">;
|
||||
// CHECK-NEXT: return Features;
|
||||
// CHECK-NEXT: }
|
||||
|
||||
// CHECK-LABEL: PredicateBitset MyTargetInstructionSelector::
|
||||
// CHECK-NEXT: computeAvailableFunctionFeatures(const MyTargetSubtarget *Subtarget, const MachineFunction *MF) const {
|
||||
// CHECK-NEXT: PredicateBitset Features;
|
||||
// CHECK-NEXT: if (Subtarget->hasC())
|
||||
// CHECK-NEXT: Features[Feature_HasCBit] = 1;
|
||||
// CHECK-NEXT: return Features;
|
||||
// CHECK-NEXT: }
|
||||
|
||||
// CHECK: bool MyTargetInstructionSelector::selectImpl(MachineInstr &I) const {
|
||||
// CHECK: MachineFunction &MF = *I.getParent()->getParent();
|
||||
// CHECK: const MachineRegisterInfo &MRI = MF.getRegInfo();
|
||||
@ -216,7 +227,7 @@ def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
|
||||
//===- Test another simple pattern with regclass operands. ----------------===//
|
||||
|
||||
// CHECK-LABEL: if ([&]() {
|
||||
// CHECK-NEXT: PredicateBitset ExpectedFeatures = {Feature_HasABit, Feature_HasBBit};
|
||||
// CHECK-NEXT: PredicateBitset ExpectedFeatures = {Feature_HasABit, Feature_HasBBit, Feature_HasCBit};
|
||||
// CHECK-NEXT: if ((AvailableFeatures & ExpectedFeatures) != ExpectedFeatures)
|
||||
// CHECK-NEXT: return false;
|
||||
// CHECK-NEXT: MachineInstr &MI0 = I;
|
||||
@ -247,7 +258,7 @@ def MULADD : I<(outs GPR32:$dst), (ins GPR32:$src1, GPR32:$src2, GPR32:$src3),
|
||||
|
||||
def MUL : I<(outs GPR32:$dst), (ins GPR32:$src2, GPR32:$src1),
|
||||
[(set GPR32:$dst, (mul GPR32:$src1, GPR32:$src2))]>,
|
||||
Requires<[HasA, HasB]>;
|
||||
Requires<[HasA, HasB, HasC]>;
|
||||
|
||||
//===- Test a pattern with ComplexPattern operands. -----------------------===//
|
||||
//
|
||||
|
||||
@ -30,7 +30,8 @@ std::unique_ptr<TargetMachine> createTargetMachine() {
|
||||
|
||||
std::unique_ptr<AArch64InstrInfo> createInstrInfo(TargetMachine *TM) {
|
||||
AArch64Subtarget ST(TM->getTargetTriple(), TM->getTargetCPU(),
|
||||
TM->getTargetFeatureString(), *TM, /* isLittle */ false);
|
||||
TM->getTargetFeatureString(), *TM, /* isLittle */ false,
|
||||
/* ForCodeSize */ false);
|
||||
return llvm::make_unique<AArch64InstrInfo>(ST);
|
||||
}
|
||||
|
||||
|
||||
@ -199,21 +199,19 @@ public:
|
||||
void emitCxxCapturedInsnList(raw_ostream &OS);
|
||||
void emitCxxCaptureStmts(raw_ostream &OS, StringRef Expr);
|
||||
|
||||
void emit(raw_ostream &OS,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
SubtargetFeatures);
|
||||
void emit(raw_ostream &OS, SubtargetFeatureInfoMap SubtargetFeatures);
|
||||
|
||||
/// Compare the priority of this object and B.
|
||||
///
|
||||
/// Returns true if this object is more important than B.
|
||||
bool isHigherPriorityThan(const RuleMatcher &B) const;
|
||||
/// Compare the priority of this object and B.
|
||||
///
|
||||
/// Returns true if this object is more important than B.
|
||||
bool isHigherPriorityThan(const RuleMatcher &B) const;
|
||||
|
||||
/// Report the maximum number of temporary operands needed by the rule
|
||||
/// matcher.
|
||||
unsigned countRendererFns() const;
|
||||
/// Report the maximum number of temporary operands needed by the rule
|
||||
/// matcher.
|
||||
unsigned countRendererFns() const;
|
||||
|
||||
// FIXME: Remove this as soon as possible
|
||||
InstructionMatcher &insnmatcher_front() const { return *Matchers.front(); }
|
||||
// FIXME: Remove this as soon as possible
|
||||
InstructionMatcher &insnmatcher_front() const { return *Matchers.front(); }
|
||||
};
|
||||
|
||||
template <class PredicateTy> class PredicateListMatcher {
|
||||
@ -951,6 +949,9 @@ private:
|
||||
|
||||
/// True if the instruction can be built solely by mutating the opcode.
|
||||
bool canMutate() const {
|
||||
if (OperandRenderers.size() != Matched.getNumOperands())
|
||||
return false;
|
||||
|
||||
for (const auto &Renderer : enumerate(OperandRenderers)) {
|
||||
if (const auto *Copy = dyn_cast<CopyRenderer>(&*Renderer.value())) {
|
||||
const OperandMatcher &OM = Matched.getOperand(Copy->getSymbolicName());
|
||||
@ -1072,8 +1073,7 @@ void RuleMatcher::emitCxxCaptureStmts(raw_ostream &OS, StringRef Expr) {
|
||||
}
|
||||
|
||||
void RuleMatcher::emit(raw_ostream &OS,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
SubtargetFeatures) {
|
||||
SubtargetFeatureInfoMap SubtargetFeatures) {
|
||||
if (Matchers.empty())
|
||||
llvm_unreachable("Unexpected empty matcher!");
|
||||
|
||||
@ -1218,7 +1218,7 @@ private:
|
||||
DenseMap<const Record *, const Record *> ComplexPatternEquivs;
|
||||
|
||||
// Map of predicates to their subtarget features.
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> SubtargetFeatures;
|
||||
SubtargetFeatureInfoMap SubtargetFeatures;
|
||||
|
||||
void gatherNodeEquivs();
|
||||
const CodeGenInstruction *findNodeEquiv(Record *N) const;
|
||||
@ -1713,14 +1713,36 @@ void GlobalISelEmitter::run(raw_ostream &OS) {
|
||||
SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(SubtargetFeatures,
|
||||
OS);
|
||||
SubtargetFeatureInfo::emitNameTable(SubtargetFeatures, OS);
|
||||
|
||||
// Separate subtarget features by how often they must be recomputed.
|
||||
SubtargetFeatureInfoMap ModuleFeatures;
|
||||
std::copy_if(SubtargetFeatures.begin(), SubtargetFeatures.end(),
|
||||
std::inserter(ModuleFeatures, ModuleFeatures.end()),
|
||||
[](const SubtargetFeatureInfoMap::value_type &X) {
|
||||
return !X.second.mustRecomputePerFunction();
|
||||
});
|
||||
SubtargetFeatureInfoMap FunctionFeatures;
|
||||
std::copy_if(SubtargetFeatures.begin(), SubtargetFeatures.end(),
|
||||
std::inserter(FunctionFeatures, FunctionFeatures.end()),
|
||||
[](const SubtargetFeatureInfoMap::value_type &X) {
|
||||
return X.second.mustRecomputePerFunction();
|
||||
});
|
||||
|
||||
SubtargetFeatureInfo::emitComputeAvailableFeatures(
|
||||
Target.getName(), "InstructionSelector", "computeAvailableFeatures",
|
||||
SubtargetFeatures, OS);
|
||||
Target.getName(), "InstructionSelector", "computeAvailableModuleFeatures",
|
||||
ModuleFeatures, OS);
|
||||
SubtargetFeatureInfo::emitComputeAvailableFeatures(
|
||||
Target.getName(), "InstructionSelector",
|
||||
"computeAvailableFunctionFeatures", FunctionFeatures, OS,
|
||||
"const MachineFunction *MF");
|
||||
|
||||
OS << "bool " << Target.getName()
|
||||
<< "InstructionSelector::selectImpl(MachineInstr &I) const {\n"
|
||||
<< " MachineFunction &MF = *I.getParent()->getParent();\n"
|
||||
<< " const MachineRegisterInfo &MRI = MF.getRegInfo();\n";
|
||||
<< " const MachineRegisterInfo &MRI = MF.getRegInfo();\n"
|
||||
<< " // FIXME: This should be computed on a per-function basis rather than per-insn.\n"
|
||||
<< " AvailableFunctionFeatures = computeAvailableFunctionFeatures(&STI, &MF);\n"
|
||||
<< " const PredicateBitset AvailableFeatures = getAvailableFeatures();\n";
|
||||
|
||||
for (auto &Rule : Rules) {
|
||||
Rule.emit(OS, SubtargetFeatures);
|
||||
@ -1730,6 +1752,26 @@ void GlobalISelEmitter::run(raw_ostream &OS) {
|
||||
OS << " return false;\n"
|
||||
<< "}\n"
|
||||
<< "#endif // ifdef GET_GLOBALISEL_IMPL\n";
|
||||
|
||||
OS << "#ifdef GET_GLOBALISEL_PREDICATES_DECL\n"
|
||||
<< "PredicateBitset AvailableModuleFeatures;\n"
|
||||
<< "mutable PredicateBitset AvailableFunctionFeatures;\n"
|
||||
<< "PredicateBitset getAvailableFeatures() const {\n"
|
||||
<< " return AvailableModuleFeatures | AvailableFunctionFeatures;\n"
|
||||
<< "}\n"
|
||||
<< "PredicateBitset\n"
|
||||
<< "computeAvailableModuleFeatures(const " << Target.getName()
|
||||
<< "Subtarget *Subtarget) const;\n"
|
||||
<< "PredicateBitset\n"
|
||||
<< "computeAvailableFunctionFeatures(const " << Target.getName()
|
||||
<< "Subtarget *Subtarget,\n"
|
||||
<< " const MachineFunction *MF) const;\n"
|
||||
<< "#endif // ifdef GET_GLOBALISEL_PREDICATES_DECL\n";
|
||||
|
||||
OS << "#ifdef GET_GLOBALISEL_PREDICATES_INIT\n"
|
||||
<< "AvailableModuleFeatures(computeAvailableModuleFeatures(&STI)),\n"
|
||||
<< "AvailableFunctionFeatures()\n"
|
||||
<< "#endif // ifdef GET_GLOBALISEL_PREDICATES_INIT\n";
|
||||
}
|
||||
|
||||
void GlobalISelEmitter::declareSubtargetFeature(Record *Predicate) {
|
||||
|
||||
@ -45,8 +45,7 @@ SubtargetFeatureInfo::getAll(const RecordKeeper &Records) {
|
||||
}
|
||||
|
||||
void SubtargetFeatureInfo::emitSubtargetFeatureFlagEnumeration(
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> &SubtargetFeatures,
|
||||
raw_ostream &OS) {
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS) {
|
||||
OS << "// Flags for subtarget features that participate in "
|
||||
<< "instruction matching.\n";
|
||||
OS << "enum SubtargetFeatureFlag : "
|
||||
@ -60,8 +59,7 @@ void SubtargetFeatureInfo::emitSubtargetFeatureFlagEnumeration(
|
||||
}
|
||||
|
||||
void SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> &SubtargetFeatures,
|
||||
raw_ostream &OS) {
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS) {
|
||||
OS << "// Bits for subtarget features that participate in "
|
||||
<< "instruction matching.\n";
|
||||
OS << "enum SubtargetFeatureBits : "
|
||||
@ -74,8 +72,7 @@ void SubtargetFeatureInfo::emitSubtargetFeatureBitEnumeration(
|
||||
}
|
||||
|
||||
void SubtargetFeatureInfo::emitNameTable(
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> &SubtargetFeatures,
|
||||
raw_ostream &OS) {
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS) {
|
||||
// Need to sort the name table so that lookup by the log of the enum value
|
||||
// gives the proper name. More specifically, for a feature of value 1<<n,
|
||||
// SubtargetFeatureNames[n] should be the name of the feature.
|
||||
@ -102,11 +99,13 @@ void SubtargetFeatureInfo::emitNameTable(
|
||||
|
||||
void SubtargetFeatureInfo::emitComputeAvailableFeatures(
|
||||
StringRef TargetName, StringRef ClassName, StringRef FuncName,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> &SubtargetFeatures,
|
||||
raw_ostream &OS) {
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS,
|
||||
StringRef ExtraParams) {
|
||||
OS << "PredicateBitset " << TargetName << ClassName << "::\n"
|
||||
<< FuncName << "(const MachineFunction *MF, const " << TargetName
|
||||
<< "Subtarget *Subtarget) const {\n";
|
||||
<< FuncName << "(const " << TargetName << "Subtarget *Subtarget";
|
||||
if (!ExtraParams.empty())
|
||||
OS << ", " << ExtraParams;
|
||||
OS << ") const {\n";
|
||||
OS << " PredicateBitset Features;\n";
|
||||
for (const auto &SF : SubtargetFeatures) {
|
||||
const SubtargetFeatureInfo &SFI = SF.second;
|
||||
@ -120,8 +119,7 @@ void SubtargetFeatureInfo::emitComputeAvailableFeatures(
|
||||
|
||||
void SubtargetFeatureInfo::emitComputeAssemblerAvailableFeatures(
|
||||
StringRef TargetName, StringRef ClassName, StringRef FuncName,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID> &SubtargetFeatures,
|
||||
raw_ostream &OS) {
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS) {
|
||||
OS << "uint64_t " << TargetName << ClassName << "::\n"
|
||||
<< FuncName << "(const FeatureBitset& FB) const {\n";
|
||||
OS << " uint64_t Features = 0;\n";
|
||||
|
||||
@ -21,6 +21,9 @@ namespace llvm {
|
||||
class Record;
|
||||
class RecordKeeper;
|
||||
|
||||
struct SubtargetFeatureInfo;
|
||||
using SubtargetFeatureInfoMap = std::map<Record *, SubtargetFeatureInfo, LessRecordByID>;
|
||||
|
||||
/// Helper class for storing information on a subtarget feature which
|
||||
/// participates in instruction matching.
|
||||
struct SubtargetFeatureInfo {
|
||||
@ -43,6 +46,10 @@ struct SubtargetFeatureInfo {
|
||||
return "Feature_" + TheDef->getName().str() + "Bit";
|
||||
}
|
||||
|
||||
bool mustRecomputePerFunction() const {
|
||||
return TheDef->getValueAsBit("RecomputePerFunction");
|
||||
}
|
||||
|
||||
void dump() const;
|
||||
static std::vector<std::pair<Record *, SubtargetFeatureInfo>>
|
||||
getAll(const RecordKeeper &Records);
|
||||
@ -52,21 +59,17 @@ struct SubtargetFeatureInfo {
|
||||
/// This version emits the bit value for the feature and is therefore limited
|
||||
/// to 64 feature bits.
|
||||
static void emitSubtargetFeatureFlagEnumeration(
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
&SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS);
|
||||
|
||||
/// Emit the subtarget feature flag definitions.
|
||||
///
|
||||
/// This version emits the bit index for the feature and can therefore support
|
||||
/// more than 64 feature bits.
|
||||
static void emitSubtargetFeatureBitEnumeration(
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
&SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
static void
|
||||
emitSubtargetFeatureBitEnumeration(SubtargetFeatureInfoMap &SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
|
||||
static void emitNameTable(std::map<Record *, SubtargetFeatureInfo,
|
||||
LessRecordByID> &SubtargetFeatures,
|
||||
static void emitNameTable(SubtargetFeatureInfoMap &SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
|
||||
/// Emit the function to compute the list of available features given a
|
||||
@ -82,11 +85,12 @@ struct SubtargetFeatureInfo {
|
||||
/// \param FuncName The name of the function to emit.
|
||||
/// \param SubtargetFeatures A map of TableGen records to the
|
||||
/// SubtargetFeatureInfo equivalent.
|
||||
static void emitComputeAvailableFeatures(
|
||||
StringRef TargetName, StringRef ClassName, StringRef FuncName,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
&SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
/// \param ExtraParams Additional arguments to the generated function.
|
||||
static void
|
||||
emitComputeAvailableFeatures(StringRef TargetName, StringRef ClassName,
|
||||
StringRef FuncName,
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures,
|
||||
raw_ostream &OS, StringRef ExtraParams = "");
|
||||
|
||||
/// Emit the function to compute the list of available features given a
|
||||
/// subtarget.
|
||||
@ -103,9 +107,7 @@ struct SubtargetFeatureInfo {
|
||||
/// SubtargetFeatureInfo equivalent.
|
||||
static void emitComputeAssemblerAvailableFeatures(
|
||||
StringRef TargetName, StringRef ClassName, StringRef FuncName,
|
||||
std::map<Record *, SubtargetFeatureInfo, LessRecordByID>
|
||||
&SubtargetFeatures,
|
||||
raw_ostream &OS);
|
||||
SubtargetFeatureInfoMap &SubtargetFeatures, raw_ostream &OS);
|
||||
};
|
||||
} // end namespace llvm
|
||||
|
||||
|
||||
Loading…
Reference in New Issue
Block a user