From 6ad5990f8fbdc7e830d7dd794755ab13252e5adc Mon Sep 17 00:00:00 2001 From: Matthias Braun Date: Thu, 19 Jan 2017 01:04:08 +0000 Subject: [PATCH] Use an actual valid register in test llvm-svn: 292459 --- test/CodeGen/AArch64/regcoal-physreg.mir | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/test/CodeGen/AArch64/regcoal-physreg.mir b/test/CodeGen/AArch64/regcoal-physreg.mir index a94613e58a8..4bcabd10088 100644 --- a/test/CodeGen/AArch64/regcoal-physreg.mir +++ b/test/CodeGen/AArch64/regcoal-physreg.mir @@ -63,9 +63,9 @@ body: | ; Only coalesce when the source register is reserved as a whole (this is ; a limitation of the current code which cannot update liveness information ; of the non-reserved part). - ; CHECK: %6 = COPY %xzr_x0 + ; CHECK: %6 = COPY %x28_fp ; CHECK: HINT 0, implicit %6 - %6 = COPY %xzr_x0 + %6 = COPY %x28_fp HINT 0, implicit %6 ; It is not fine to coalesce copies from reserved physregs when they are