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[TableGen] AsmMatcher: Add AsmVariantName to Instruction class.
Summary: This allows specifying instructions that are available only in specific assembler variant. If AsmVariantName is specified then instruction will be presented only in MatchTable for this variant. If not specified then assembler variants will be determined based on AsmString. Also this allows splitting assembler match tables in same way as it is done in dissasembler. Reviewers: ab, tstellarAMD, craig.topper, vpykhtin Subscribers: wdng Differential Revision: https://reviews.llvm.org/D24249 llvm-svn: 280952
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@ -488,6 +488,12 @@ class Instruction {
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/// constraint. For example, "$Rn = $Rd".
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string TwoOperandAliasConstraint = "";
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/// Assembler variant name to use for this instruction. If specified then
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/// instruction will be presented only in MatchTable for this variant. If
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/// not specified then assembler variants will be determined based on
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/// AsmString
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string AsmVariantName = "";
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///@}
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/// UseNamedOperandTable - If set, the operand indices of this instruction
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@ -1134,6 +1140,10 @@ class InstAlias<string Asm, dag Result, int Emit = 1> {
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// defined AsmMatchConverter and instead use the function generated by the
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// dag Result.
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bit UseInstAsmMatchConverter = 1;
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// Assembler variant name to use for this alias. If not specified then
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// assembler variants will be determined based on AsmString
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string AsmVariantName = "";
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}
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//===----------------------------------------------------------------------===//
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46
test/TableGen/AsmVariant.td
Normal file
46
test/TableGen/AsmVariant.td
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@ -0,0 +1,46 @@
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// RUN: llvm-tblgen -gen-asm-matcher -I %p/../../include %s | FileCheck %s
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// Check that cpecifying AsmVariant works correctly
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include "llvm/Target/Target.td"
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def ArchInstrInfo : InstrInfo { }
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def FooAsmParserVariant : AsmParserVariant {
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let Variant = 0;
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let Name = "Foo";
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}
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def BarAsmParserVariant : AsmParserVariant {
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let Variant = 1;
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let Name = "Bar";
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}
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def Arch : Target {
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let InstructionSet = ArchInstrInfo;
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let AssemblyParserVariants = [FooAsmParserVariant, BarAsmParserVariant];
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}
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def Reg : Register<"reg">;
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def RegClass : RegisterClass<"foo", [i32], 0, (add Reg)>;
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def foo : Instruction {
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let Size = 2;
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let OutOperandList = (outs);
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let InOperandList = (ins);
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let AsmString = "foo";
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let AsmVariantName = "Foo";
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}
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def BarAlias : InstAlias<"bar", (foo)> {
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string AsmVariantName = "Bar";
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}
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// CHECK: static const MatchEntry MatchTable0[] = {
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// CHECK-NEXT: /* foo */, Arch::foo
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// CHECK-NEXT: };
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// CHECK: static const MatchEntry MatchTable1[] = {
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// CHECK-NEXT: /* bar */, Arch::foo
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// CHECK-NEXT: };
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@ -353,6 +353,7 @@ public:
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std::string TokenizingCharacters;
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std::string SeparatorCharacters;
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std::string BreakCharacters;
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std::string Name;
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int AsmVariantNo;
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};
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@ -1468,6 +1469,7 @@ void AsmMatcherInfo::buildInfo() {
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AsmVariant->getValueAsString("SeparatorCharacters");
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Variant.BreakCharacters =
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AsmVariant->getValueAsString("BreakCharacters");
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Variant.Name = AsmVariant->getValueAsString("Name");
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Variant.AsmVariantNo = AsmVariant->getValueAsInt("Variant");
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for (const CodeGenInstruction *CGI : Target.getInstructionsByEnumValue()) {
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@ -1481,6 +1483,11 @@ void AsmMatcherInfo::buildInfo() {
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if (CGI->TheDef->getValueAsBit("isCodeGenOnly"))
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continue;
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// Ignore instructions for different instructions
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const std::string V = CGI->TheDef->getValueAsString("AsmVariantName");
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if (!V.empty() && V != Variant.Name)
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continue;
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auto II = llvm::make_unique<MatchableInfo>(*CGI);
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II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
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@ -1509,6 +1516,10 @@ void AsmMatcherInfo::buildInfo() {
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.startswith( MatchPrefix))
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continue;
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const std::string V = Alias->TheDef->getValueAsString("AsmVariantName");
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if (!V.empty() && V != Variant.Name)
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continue;
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auto II = llvm::make_unique<MatchableInfo>(std::move(Alias));
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II->initialize(*this, SingletonRegisters, Variant, HasMnemonicFirst);
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