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Remove the code that expands MIPS' .cpload directive.

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llvm-svn: 157494
This commit is contained in:
Akira Hatanaka 2012-05-25 20:46:52 +00:00
parent 3514125a37
commit 6af9e8ba7d
2 changed files with 0 additions and 24 deletions
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23
lib/Target/Mips/MipsMCInstLower.cpp
View File

@ -117,29 +117,6 @@ static void CreateMCInst(MCInst& Inst, unsigned Opc, const MCOperand& Opnd0,
Inst.addOperand(Opnd2);
}
// Lower ".cpload $reg" to
// "lui $gp, %hi(_gp_disp)"
// "addiu $gp, $gp, %lo(_gp_disp)"
// "addu $gp, $gp, $t9"
void MipsMCInstLower::LowerCPLOAD(SmallVector<MCInst, 4>& MCInsts) {
MCOperand GPReg = MCOperand::CreateReg(Mips::GP);
MCOperand T9Reg = MCOperand::CreateReg(Mips::T9);
StringRef SymName("_gp_disp");
const MCSymbol *Sym = Ctx->GetOrCreateSymbol(SymName);
const MCSymbolRefExpr *MCSym;
MCSym = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_Mips_ABS_HI, *Ctx);
MCOperand SymHi = MCOperand::CreateExpr(MCSym);
MCSym = MCSymbolRefExpr::Create(Sym, MCSymbolRefExpr::VK_Mips_ABS_LO, *Ctx);
MCOperand SymLo = MCOperand::CreateExpr(MCSym);
MCInsts.resize(3);
CreateMCInst(MCInsts[0], Mips::LUi, GPReg, SymHi);
CreateMCInst(MCInsts[1], Mips::ADDiu, GPReg, GPReg, SymLo);
CreateMCInst(MCInsts[2], Mips::ADDu, GPReg, GPReg, T9Reg);
}
MCOperand MipsMCInstLower::LowerOperand(const MachineOperand& MO,
unsigned offset) const {
MachineOperandType MOTy = MO.getType();

1
lib/Target/Mips/MipsMCInstLower.h
View File

@ -33,7 +33,6 @@ public:
MipsMCInstLower(MipsAsmPrinter &asmprinter);
void Initialize(Mangler *mang, MCContext* C);
void Lower(const MachineInstr *MI, MCInst &OutMI) const;
void LowerCPLOAD(SmallVector<MCInst, 4>& MCInsts);
void LowerUnalignedLoadStore(const MachineInstr *MI,
SmallVector<MCInst, 4>& MCInsts);
void LowerSETGP01(SmallVector<MCInst, 4>& MCInsts);