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misched: Invoke the DAG builder on each sequence of schedulable instructions.
llvm-svn: 148171
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ce507adb56
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@ -20,6 +20,7 @@
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#include "llvm/CodeGen/MachinePassRegistry.h"
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#include "llvm/CodeGen/Passes.h"
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#include "llvm/Analysis/AliasAnalysis.h"
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#include "llvm/Target/TargetInstrInfo.h"
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#include "llvm/Support/CommandLine.h"
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#include "llvm/Support/Debug.h"
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#include "llvm/Support/ErrorHandling.h"
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@ -175,9 +176,12 @@ SchedDefaultRegistry("default", "Activate the scheduler pass, "
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/// Schedule - This is called back from ScheduleDAGInstrs::Run() when it's
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/// time to do some work.
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void MachineScheduler::Schedule() {
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BuildSchedGraph(&Pass->getAnalysis<AliasAnalysis>());
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DEBUG(dbgs() << "********** MI Scheduling **********\n");
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DEBUG(for (unsigned su = 0, e = SUnits.size(); su != e; ++su)
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SUnits[su].dumpAll(this));
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// TODO: Put interesting things here.
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}
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@ -202,12 +206,33 @@ bool MachineSchedulerPass::runOnMachineFunction(MachineFunction &mf) {
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for (MachineFunction::iterator MBB = MF->begin(), MBBEnd = MF->end();
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MBB != MBBEnd; ++MBB) {
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// Break the block into scheduling regions [I, RegionEnd), and schedule each
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// region as soon as it is discovered.
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unsigned RemainingCount = MBB->size();
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for(MachineBasicBlock::iterator RegionEnd = MBB->end();
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RegionEnd != MBB->begin();) {
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// The next region starts above the previous region. Look backward in the
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// instruction stream until we find the nearest boundary.
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MachineBasicBlock::iterator I = RegionEnd;
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for(;I != MBB->begin(); --I) {
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if (TII->isSchedulingBoundary(llvm::prior(I), MBB, *MF))
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break;
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}
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if (I == RegionEnd || I == llvm::prior(RegionEnd)) {
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// Skip empty or single instruction scheduling regions.
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RegionEnd = llvm::prior(RegionEnd);
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continue;
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}
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DEBUG(dbgs() << "MachineScheduling " << MF->getFunction()->getName()
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<< ":BB#" << MBB->getNumber() << "\n");
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<< ":BB#" << MBB->getNumber() << "\n From: " << *I << " To: "
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<< *RegionEnd << " Remaining: " << RemainingCount << "\n");
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// Inform ScheduleDAGInstrs of the region being scheduler. It calls back
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// to our Schedule() method.
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Scheduler->Run(MBB, MBB->begin(), MBB->end(), MBB->size());
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Scheduler->Run(MBB, I, RegionEnd, MBB->size());
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RegionEnd = I;
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}
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assert(RemainingCount == 0 && "Instruction count mismatch!");
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}
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return true;
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}
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