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[AMDGPU] Fix autogenerated wwm-reserved-spill.ll

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Due to a bug in update_llc_test_checks.py, the test is wrongly
coalesced between run lines. Remove common check prefix to fix that.
NFC.
This commit is contained in:
Sebastian Neubauer 2021-04-26 19:04:46 +02:00
parent 98f63bbad6
commit 6b1be183c5
1 changed files with 19 additions and 9 deletions
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28
test/CodeGen/AMDGPU/wwm-reserved-spill.ll
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@ -1,6 +1,6 @@
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
; RUN: llc -O0 -mtriple=amdgcn- -mcpu=gfx900 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX9-O0 %s
; RUN: llc -mtriple=amdgcn- -mcpu=gfx900 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefixes=GFX9,GFX9-O3 %s
; RUN: llc -O0 -mtriple=amdgcn- -mcpu=gfx900 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9-O0 %s
; RUN: llc -mtriple=amdgcn- -mcpu=gfx900 -amdgpu-dpp-combine=false -verify-machineinstrs < %s | FileCheck -check-prefix=GFX9-O3 %s
define amdgpu_gfx void @strict_wwm_no_cfg(<4 x i32> inreg %tmp14) {
; GFX9-O0-LABEL: strict_wwm_no_cfg:
@ -320,13 +320,23 @@ merge:
}
define hidden i32 @strict_wwm_called(i32 %a) noinline {
; GFX9-LABEL: strict_wwm_called:
; GFX9: ; %bb.0:
; GFX9-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-NEXT: v_add_u32_e32 v1, v0, v0
; GFX9: v_mul_lo_u32 v0, v1, v0
; GFX9-NEXT: v_sub_u32_e32 v0, v0, v1
; GFX9-NEXT: s_setpc_b64 s[30:31]
; GFX9-O0-LABEL: strict_wwm_called:
; GFX9-O0: ; %bb.0:
; GFX9-O0-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-O0-NEXT: v_add_u32_e32 v1, v0, v0
; GFX9-O0-NEXT: ; implicit-def: $sgpr4
; GFX9-O0-NEXT: ; implicit-def: $sgpr4
; GFX9-O0-NEXT: v_mul_lo_u32 v0, v1, v0
; GFX9-O0-NEXT: v_sub_u32_e32 v0, v0, v1
; GFX9-O0-NEXT: s_setpc_b64 s[30:31]
;
; GFX9-O3-LABEL: strict_wwm_called:
; GFX9-O3: ; %bb.0:
; GFX9-O3-NEXT: s_waitcnt vmcnt(0) expcnt(0) lgkmcnt(0)
; GFX9-O3-NEXT: v_add_u32_e32 v1, v0, v0
; GFX9-O3-NEXT: v_mul_lo_u32 v0, v1, v0
; GFX9-O3-NEXT: v_sub_u32_e32 v0, v0, v1
; GFX9-O3-NEXT: s_setpc_b64 s[30:31]
%add = add i32 %a, %a
%mul = mul i32 %add, %a
%sub = sub i32 %mul, %add