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[mips] Refactor BAL instructions.

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llvm-svn: 170954
This commit is contained in:
Akira Hatanaka 2012-12-21 23:15:59 +00:00
parent 4b2123dd9c
commit 6b9b8a5489
2 changed files with 40 additions and 10 deletions
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23
lib/Target/Mips/MipsInstrFormats.td
View File

@ -387,6 +387,29 @@ class JALR_FM {
let Inst{5-0} = 9;
}
class BAL_FM {
bits<16> offset;
bits<32> Inst;
let Inst{31-26} = 1;
let Inst{25-21} = 0;
let Inst{20-16} = 0x11;
let Inst{15-0} = offset;
}
class BGEZAL_FM<bits<5> funct> {
bits<5> rs;
bits<16> offset;
bits<32> Inst;
let Inst{31-26} = 1;
let Inst{25-21} = rs;
let Inst{20-16} = funct;
let Inst{15-0} = offset;
}
//===----------------------------------------------------------------------===//
//
// FLOATING POINT INSTRUCTION FORMATS

27
lib/Target/Mips/MipsInstrInfo.td
View File

@ -560,13 +560,22 @@ let isCall=1, hasDelaySlot=1, Defs = [RA] in {
InstSE<(outs), (ins RC:$rs), !strconcat(opstr, "\t$rs"),
[(MipsJmpLink RC:$rs)], IIBranch, FrmR>;
class BranchLink<string instr_asm, bits<5> _rt, RegisterClass RC>:
FI<0x1, (outs), (ins RC:$rs, brtarget:$imm16),
!strconcat(instr_asm, "\t$rs, $imm16"), [], IIBranch> {
let rt = _rt;
}
class BGEZAL_FT<string opstr, RegisterClass RC> :
InstSE<(outs), (ins RC:$rs, brtarget:$offset),
!strconcat(opstr, "\t$rs, $offset"), [], IIBranch, FrmI>;
}
class BAL_FT :
InstSE<(outs), (ins brtarget:$offset), "bal\t$offset", [], IIBranch, FrmI> {
let isBranch = 1;
let isTerminator = 1;
let isBarrier = 1;
let hasDelaySlot = 1;
let Defs = [RA];
}
// Mul, Div
class Mult<bits<6> func, string instr_asm, InstrItinClass itin,
RegisterClass RC, list<Register> DefRegs>:
@ -859,14 +868,12 @@ def BGTZ : CBranchZero<"bgtz", setgt, CPURegs>, BGEZ_FM<7, 0>;
def BLEZ : CBranchZero<"blez", setle, CPURegs>, BGEZ_FM<6, 0>;
def BLTZ : CBranchZero<"bltz", setlt, CPURegs>, BGEZ_FM<1, 0>;
let rt = 0x11, rs = 0, isBranch = 1, isTerminator = 1, isBarrier = 1,
hasDelaySlot = 1, Defs = [RA] in
def BAL_BR: FI<0x1, (outs), (ins brtarget:$imm16), "bal\t$imm16", [], IIBranch>;
def BAL_BR: BAL_FT, BAL_FM;
def JAL : JumpLink<"jal">, FJ<3>;
def JALR : JumpLinkReg<"jalr", CPURegs>, JALR_FM;
def BGEZAL : BranchLink<"bgezal", 0x11, CPURegs>;
def BLTZAL : BranchLink<"bltzal", 0x10, CPURegs>;
def BGEZAL : BGEZAL_FT<"bgezal", CPURegs>, BGEZAL_FM<0x11>;
def BLTZAL : BGEZAL_FT<"bltzal", CPURegs>, BGEZAL_FM<0x10>;
def TAILCALL : JumpFJ<calltarget, "j", MipsTailCall, imm>, FJ<2>, IsTailCall;
def TAILCALL_R : JumpFR<CPURegs, MipsTailCall>, MTLO_FM<8>, IsTailCall;