1
0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-10-22 04:22:57 +02:00

CodeGen: increase bits allocated for LegalizeActions

The array handling CondCodes only allocated 2 bits to describe the
desired action for each type. The new addition of a "LibCall" option
overflowed this and caused corruption for Custom actions.

No in-tree targets have a Custom CondCodeAction, so unfortunately it
can't be tested.

llvm-svn: 251033
This commit is contained in:
Tim Northover 2015-10-22 17:20:48 +00:00
parent 853fdeb009
commit 6bb4d53bf6

View File

@ -673,9 +673,9 @@ public:
((unsigned)VT.SimpleTy >> 4) < array_lengthof(CondCodeActions[0]) &&
"Table isn't big enough!");
// See setCondCodeAction for how this is encoded.
uint32_t Shift = 2 * (VT.SimpleTy & 0xF);
uint32_t Value = CondCodeActions[CC][VT.SimpleTy >> 4];
LegalizeAction Action = (LegalizeAction) ((Value >> Shift) & 0x3);
uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
uint32_t Value = CondCodeActions[CC][VT.SimpleTy >> 3];
LegalizeAction Action = (LegalizeAction) ((Value >> Shift) & 0xF);
assert(Action != Promote && "Can't promote condition code!");
return Action;
}
@ -1375,12 +1375,13 @@ protected:
LegalizeAction Action) {
assert(VT.isValid() && (unsigned)CC < array_lengthof(CondCodeActions) &&
"Table isn't big enough!");
/// The lower 5 bits of the SimpleTy index into Nth 2bit set from the 32-bit
/// value and the upper 27 bits index into the second dimension of the array
assert((unsigned)Action < 0x10 && "too many bits for bitfield array");
/// The lower 3 bits of the SimpleTy index into Nth 4bit set from the 32-bit
/// value and the upper 29 bits index into the second dimension of the array
/// to select what 32-bit value to use.
uint32_t Shift = 2 * (VT.SimpleTy & 0xF);
CondCodeActions[CC][VT.SimpleTy >> 4] &= ~((uint32_t)0x3 << Shift);
CondCodeActions[CC][VT.SimpleTy >> 4] |= (uint32_t)Action << Shift;
uint32_t Shift = 4 * (VT.SimpleTy & 0x7);
CondCodeActions[CC][VT.SimpleTy >> 3] &= ~((uint32_t)0xF << Shift);
CondCodeActions[CC][VT.SimpleTy >> 3] |= (uint32_t)Action << Shift;
}
/// If Opc/OrigVT is specified as being promoted, the promotion code defaults
@ -1921,10 +1922,10 @@ private:
/// For each condition code (ISD::CondCode) keep a LegalizeAction that
/// indicates how instruction selection should deal with the condition code.
///
/// Because each CC action takes up 2 bits, we need to have the array size be
/// Because each CC action takes up 4 bits, we need to have the array size be
/// large enough to fit all of the value types. This can be done by rounding
/// up the MVT::LAST_VALUETYPE value to the next multiple of 16.
uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::LAST_VALUETYPE + 15) / 16];
/// up the MVT::LAST_VALUETYPE value to the next multiple of 8.
uint32_t CondCodeActions[ISD::SETCC_INVALID][(MVT::LAST_VALUETYPE + 7) / 8];
ValueTypeActionImpl ValueTypeActions;