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[mips] 80-column.

llvm-svn: 204252
This commit is contained in:
Matheus Almeida 2014-03-19 16:29:06 +00:00
parent 78b2682fd9
commit 6bbe244b09

View File

@ -42,14 +42,18 @@ MCCodeEmitter *createMipsMCCodeEmitterEL(const MCInstrInfo &MCII,
const MCSubtargetInfo &STI,
MCContext &Ctx);
MCAsmBackend *createMipsAsmBackendEB32(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL32(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEB64(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL64(const Target &T, const MCRegisterInfo &MRI,
StringRef TT, StringRef CPU);
MCAsmBackend *createMipsAsmBackendEB32(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL32(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEB64(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCAsmBackend *createMipsAsmBackendEL64(const Target &T,
const MCRegisterInfo &MRI, StringRef TT,
StringRef CPU);
MCObjectWriter *createMipsELFObjectWriter(raw_ostream &OS,
uint8_t OSABI,