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rangify; NFCI
llvm-svn: 256891
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@ -122,8 +122,7 @@ INITIALIZE_PASS_END(MachineCSE, "machine-cse",
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bool MachineCSE::PerformTrivialCopyPropagation(MachineInstr *MI,
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MachineBasicBlock *MBB) {
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bool Changed = false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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MachineOperand &MO = MI->getOperand(i);
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for (MachineOperand &MO : MI->operands()) {
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if (!MO.isReg() || !MO.isUse())
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continue;
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unsigned Reg = MO.getReg();
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@ -186,8 +185,7 @@ MachineCSE::isPhysDefTriviallyDead(unsigned Reg,
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return true;
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bool SeenDef = false;
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for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = I->getOperand(i);
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for (const MachineOperand &MO : I->operands()) {
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if (MO.isRegMask() && MO.clobbersPhysReg(Reg))
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SeenDef = true;
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if (!MO.isReg() || !MO.getReg())
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@ -220,8 +218,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
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SmallVectorImpl<unsigned> &PhysDefs,
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bool &PhysUseDef) const{
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// First, add all uses to PhysRefs.
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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for (const MachineOperand &MO : MI->operands()) {
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if (!MO.isReg() || MO.isDef())
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continue;
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unsigned Reg = MO.getReg();
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@ -239,8 +236,7 @@ bool MachineCSE::hasLivePhysRegDefUses(const MachineInstr *MI,
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// (which currently contains only uses), set the PhysUseDef flag.
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PhysUseDef = false;
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MachineBasicBlock::const_iterator I = MI; I = std::next(I);
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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for (const MachineOperand &MO : MI->operands()) {
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if (!MO.isReg() || !MO.isDef())
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continue;
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unsigned Reg = MO.getReg();
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@ -311,8 +307,7 @@ bool MachineCSE::PhysRegDefsReach(MachineInstr *CSMI, MachineInstr *MI,
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if (I == E)
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return true;
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for (unsigned i = 0, e = I->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = I->getOperand(i);
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for (const MachineOperand &MO : I->operands()) {
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// RegMasks go on instructions like calls that clobber lots of physregs.
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// Don't attempt to CSE across such an instruction.
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if (MO.isRegMask())
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@ -398,8 +393,7 @@ bool MachineCSE::isProfitableToCSE(unsigned CSReg, unsigned Reg,
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// Heuristics #2: If the expression doesn't not use a vr and the only use
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// of the redundant computation are copies, do not cse.
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bool HasVRegUse = false;
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for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
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const MachineOperand &MO = MI->getOperand(i);
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for (const MachineOperand &MO : MI->operands()) {
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if (MO.isReg() && MO.isUse() &&
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TargetRegisterInfo::isVirtualRegister(MO.getReg())) {
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HasVRegUse = true;
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@ -580,9 +574,9 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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// Actually perform the elimination.
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if (DoCSE) {
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for (unsigned i = 0, e = CSEPairs.size(); i != e; ++i) {
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unsigned OldReg = CSEPairs[i].first;
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unsigned NewReg = CSEPairs[i].second;
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for (std::pair<unsigned, unsigned> &CSEPair : CSEPairs) {
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unsigned OldReg = CSEPair.first;
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unsigned NewReg = CSEPair.second;
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// OldReg may have been unused but is used now, clear the Dead flag
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MachineInstr *Def = MRI->getUniqueVRegDef(NewReg);
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assert(Def != nullptr && "CSEd register has no unique definition?");
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@ -594,8 +588,8 @@ bool MachineCSE::ProcessBlock(MachineBasicBlock *MBB) {
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// Go through implicit defs of CSMI and MI, if a def is not dead at MI,
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// we should make sure it is not dead at CSMI.
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for (unsigned i = 0, e = ImplicitDefsToUpdate.size(); i != e; ++i)
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CSMI->getOperand(ImplicitDefsToUpdate[i]).setIsDead(false);
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for (unsigned ImplicitDefToUpdate : ImplicitDefsToUpdate)
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CSMI->getOperand(ImplicitDefToUpdate).setIsDead(false);
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// Go through implicit defs of CSMI and MI, and clear the kill flags on
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// their uses in all the instructions between CSMI and MI.
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@ -685,18 +679,14 @@ bool MachineCSE::PerformCSE(MachineDomTreeNode *Node) {
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Node = WorkList.pop_back_val();
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Scopes.push_back(Node);
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const std::vector<MachineDomTreeNode*> &Children = Node->getChildren();
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unsigned NumChildren = Children.size();
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OpenChildren[Node] = NumChildren;
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for (unsigned i = 0; i != NumChildren; ++i) {
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MachineDomTreeNode *Child = Children[i];
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OpenChildren[Node] = Children.size();
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for (MachineDomTreeNode *Child : Children)
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WorkList.push_back(Child);
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}
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} while (!WorkList.empty());
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// Now perform CSE.
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bool Changed = false;
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for (unsigned i = 0, e = Scopes.size(); i != e; ++i) {
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MachineDomTreeNode *Node = Scopes[i];
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for (MachineDomTreeNode *Node : Scopes) {
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MachineBasicBlock *MBB = Node->getBlock();
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EnterScope(MBB);
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Changed |= ProcessBlock(MBB);
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