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[InstCombine] drop poison flags when simplifying 'shl' based on demanded bits
As with other transforms in demanded bits, we must be careful not to wrongly propagate nsw/nuw if we are reducing values leading up to the shift. This bug was introduced with 1b24f35f843c and leads to the miscompile shown in: https://llvm.org/PR50341
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@ -575,8 +575,11 @@ Value *InstCombinerImpl::SimplifyDemandedUseBits(Value *V, APInt DemandedMask,
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// demanding those bits from the pre-shifted operand either.
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if (unsigned CTLZ = DemandedMask.countLeadingZeros()) {
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APInt DemandedFromOp(APInt::getLowBitsSet(BitWidth, BitWidth - CTLZ));
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if (SimplifyDemandedBits(I, 0, DemandedFromOp, Known, Depth + 1))
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if (SimplifyDemandedBits(I, 0, DemandedFromOp, Known, Depth + 1)) {
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// We can't guarantee that nsw/nuw hold after simplifying the operand.
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I->dropPoisonGeneratingFlags();
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return I;
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}
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}
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computeKnownBits(I, Known, Depth, CxtI);
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}
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@ -89,7 +89,7 @@ define i32 @set_shl_mask(i32 %x, i32 %y) {
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define i8 @must_drop_poison(i32 %x, i32 %y) {
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; CHECK-LABEL: @must_drop_poison(
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; CHECK-NEXT: [[S:%.*]] = shl nuw nsw i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[S:%.*]] = shl i32 [[X:%.*]], [[Y:%.*]]
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; CHECK-NEXT: [[T:%.*]] = trunc i32 [[S]] to i8
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; CHECK-NEXT: ret i8 [[T]]
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;
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