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[X86][AVX512] Add vector rotate tests for AVX512 targets
AVX512 does have vector rotate instructions, but we don't lower to them yet llvm-svn: 294766
This commit is contained in:
Simon Pilgrim
parent
975b70d555
commit
6cca34ea15
@ -3,9 +3,11 @@
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+sse4.1 | FileCheck %s --check-prefix=ALL --check-prefix=SSE --check-prefix=SSE41
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VL
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
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; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
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;
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; Just one 32-bit run to make sure we do reasonable things for i64 rotates.
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; RUN: llc < %s -mtriple=i686-unknown-unknown -mattr=+sse2 | FileCheck %s --check-prefix=ALL --check-prefix=X32-SSE --check-prefix=X32-SSE2
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@ -75,6 +77,15 @@ define <2 x i64> @var_rotate_v2i64(<2 x i64> %a, <2 x i64> %b) nounwind {
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: var_rotate_v2i64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vmovdqa {{.*#+}} xmm2 = [64,64]
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; AVX512-NEXT: vpsubq %xmm1, %xmm2, %xmm2
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; AVX512-NEXT: vpsllvq %xmm1, %xmm0, %xmm1
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; AVX512-NEXT: vpsrlvq %xmm2, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: var_rotate_v2i64:
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; XOP: # BB#0:
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; XOP-NEXT: vprotq %xmm1, %xmm0, %xmm0
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@ -203,6 +214,15 @@ define <4 x i32> @var_rotate_v4i32(<4 x i32> %a, <4 x i32> %b) nounwind {
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: var_rotate_v4i32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %xmm2
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; AVX512-NEXT: vpsubd %xmm1, %xmm2, %xmm2
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; AVX512-NEXT: vpsllvd %xmm1, %xmm0, %xmm1
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; AVX512-NEXT: vpsrlvd %xmm2, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: var_rotate_v4i32:
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; XOP: # BB#0:
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; XOP-NEXT: vprotd %xmm1, %xmm0, %xmm0
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@ -432,6 +452,26 @@ define <8 x i16> @var_rotate_v8i16(<8 x i16> %a, <8 x i16> %b) nounwind {
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512BW-LABEL: var_rotate_v8i16:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: # kill: %XMM1<def> %XMM1<kill> %ZMM1<def>
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; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
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; AVX512BW-NEXT: vpsubw %xmm1, %xmm2, %xmm2
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; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
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; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
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; AVX512BW-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512VL-LABEL: var_rotate_v8i16:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vmovdqu {{.*#+}} xmm2 = [16,16,16,16,16,16,16,16]
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; AVX512VL-NEXT: vpsubw %xmm1, %xmm2, %xmm2
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; AVX512VL-NEXT: vpsllvw %xmm1, %xmm0, %xmm1
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; AVX512VL-NEXT: vpsrlvw %xmm2, %xmm0, %xmm0
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; AVX512VL-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512VL-NEXT: retq
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;
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; XOP-LABEL: var_rotate_v8i16:
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; XOP: # BB#0:
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; XOP-NEXT: vprotw %xmm1, %xmm0, %xmm0
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@ -650,6 +690,34 @@ define <16 x i8> @var_rotate_v16i8(<16 x i8> %a, <16 x i8> %b) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512BW-LABEL: var_rotate_v16i8:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
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; AVX512BW-NEXT: vpsubb %xmm1, %xmm2, %xmm2
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; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
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; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
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; AVX512BW-NEXT: vpsllvd %zmm1, %zmm0, %zmm1
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; AVX512BW-NEXT: vpmovdb %zmm1, %xmm1
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; AVX512BW-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero,xmm2[8],zero,zero,zero,xmm2[9],zero,zero,zero,xmm2[10],zero,zero,zero,xmm2[11],zero,zero,zero,xmm2[12],zero,zero,zero,xmm2[13],zero,zero,zero,xmm2[14],zero,zero,zero,xmm2[15],zero,zero,zero
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; AVX512BW-NEXT: vpsrlvd %zmm2, %zmm0, %zmm0
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; AVX512BW-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512BW-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512VL-LABEL: var_rotate_v16i8:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vmovdqu {{.*#+}} xmm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
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; AVX512VL-NEXT: vpsubb %xmm1, %xmm2, %xmm2
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; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm1 = xmm1[0],zero,zero,zero,xmm1[1],zero,zero,zero,xmm1[2],zero,zero,zero,xmm1[3],zero,zero,zero,xmm1[4],zero,zero,zero,xmm1[5],zero,zero,zero,xmm1[6],zero,zero,zero,xmm1[7],zero,zero,zero,xmm1[8],zero,zero,zero,xmm1[9],zero,zero,zero,xmm1[10],zero,zero,zero,xmm1[11],zero,zero,zero,xmm1[12],zero,zero,zero,xmm1[13],zero,zero,zero,xmm1[14],zero,zero,zero,xmm1[15],zero,zero,zero
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; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
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; AVX512VL-NEXT: vpsllvd %zmm1, %zmm0, %zmm1
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; AVX512VL-NEXT: vpmovdb %zmm1, %xmm1
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; AVX512VL-NEXT: vpmovzxbd {{.*#+}} zmm2 = xmm2[0],zero,zero,zero,xmm2[1],zero,zero,zero,xmm2[2],zero,zero,zero,xmm2[3],zero,zero,zero,xmm2[4],zero,zero,zero,xmm2[5],zero,zero,zero,xmm2[6],zero,zero,zero,xmm2[7],zero,zero,zero,xmm2[8],zero,zero,zero,xmm2[9],zero,zero,zero,xmm2[10],zero,zero,zero,xmm2[11],zero,zero,zero,xmm2[12],zero,zero,zero,xmm2[13],zero,zero,zero,xmm2[14],zero,zero,zero,xmm2[15],zero,zero,zero
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; AVX512VL-NEXT: vpsrlvd %zmm2, %zmm0, %zmm0
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; AVX512VL-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512VL-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512VL-NEXT: retq
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;
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; XOP-LABEL: var_rotate_v16i8:
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; XOP: # BB#0:
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; XOP-NEXT: vprotb %xmm1, %xmm0, %xmm0
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@ -773,6 +841,13 @@ define <2 x i64> @constant_rotate_v2i64(<2 x i64> %a) nounwind {
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: constant_rotate_v2i64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllvq {{.*}}(%rip), %xmm0, %xmm1
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; AVX512-NEXT: vpsrlvq {{.*}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOPAVX1-LABEL: constant_rotate_v2i64:
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; XOPAVX1: # BB#0:
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; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm1
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@ -873,6 +948,13 @@ define <4 x i32> @constant_rotate_v4i32(<4 x i32> %a) nounwind {
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; AVX2-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX2-NEXT: retq
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;
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; AVX512-LABEL: constant_rotate_v4i32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllvd {{.*}}(%rip), %xmm0, %xmm1
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; AVX512-NEXT: vpsrlvd {{.*}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOPAVX1-LABEL: constant_rotate_v4i32:
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; XOPAVX1: # BB#0:
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; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm1
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@ -995,6 +1077,23 @@ define <8 x i16> @constant_rotate_v8i16(<8 x i16> %a) nounwind {
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; AVX2-NEXT: vzeroupper
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; AVX2-NEXT: retq
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;
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; AVX512BW-LABEL: constant_rotate_v8i16:
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; AVX512BW: # BB#0:
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; AVX512BW-NEXT: # kill: %XMM0<def> %XMM0<kill> %ZMM0<def>
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7]
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; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
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; AVX512BW-NEXT: vmovdqa {{.*#+}} xmm2 = [16,15,14,13,12,11,10,9]
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; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
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; AVX512BW-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512BW-NEXT: retq
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;
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; AVX512VL-LABEL: constant_rotate_v8i16:
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; AVX512VL: # BB#0:
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; AVX512VL-NEXT: vpsllvw {{.*}}(%rip), %xmm0, %xmm1
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; AVX512VL-NEXT: vpsrlvw {{.*}}(%rip), %xmm0, %xmm0
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; AVX512VL-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512VL-NEXT: retq
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;
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; XOP-LABEL: constant_rotate_v8i16:
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; XOP: # BB#0:
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; XOP-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm1
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@ -1165,6 +1264,16 @@ define <16 x i8> @constant_rotate_v16i8(<16 x i8> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: constant_rotate_v16i8:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpmovzxbd {{.*#+}} zmm0 = xmm0[0],zero,zero,zero,xmm0[1],zero,zero,zero,xmm0[2],zero,zero,zero,xmm0[3],zero,zero,zero,xmm0[4],zero,zero,zero,xmm0[5],zero,zero,zero,xmm0[6],zero,zero,zero,xmm0[7],zero,zero,zero,xmm0[8],zero,zero,zero,xmm0[9],zero,zero,zero,xmm0[10],zero,zero,zero,xmm0[11],zero,zero,zero,xmm0[12],zero,zero,zero,xmm0[13],zero,zero,zero,xmm0[14],zero,zero,zero,xmm0[15],zero,zero,zero
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; AVX512-NEXT: vpsllvd {{.*}}(%rip), %zmm0, %zmm1
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; AVX512-NEXT: vpmovdb %zmm1, %xmm1
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; AVX512-NEXT: vpsrlvd {{.*}}(%rip), %zmm0, %zmm0
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; AVX512-NEXT: vpmovdb %zmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: constant_rotate_v16i8:
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; XOP: # BB#0:
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; XOP-NEXT: vpshlb {{.*}}(%rip), %xmm0, %xmm1
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@ -1257,6 +1366,13 @@ define <2 x i64> @splatconstant_rotate_v2i64(<2 x i64> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: splatconstant_rotate_v2i64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllq $14, %xmm0, %xmm1
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; AVX512-NEXT: vpsrlq $50, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: splatconstant_rotate_v2i64:
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; XOP: # BB#0:
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; XOP-NEXT: vprotq $14, %xmm0, %xmm0
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@ -1291,6 +1407,13 @@ define <4 x i32> @splatconstant_rotate_v4i32(<4 x i32> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: splatconstant_rotate_v4i32:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpslld $4, %xmm0, %xmm1
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; AVX512-NEXT: vpsrld $28, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: splatconstant_rotate_v4i32:
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; XOP: # BB#0:
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; XOP-NEXT: vprotd $4, %xmm0, %xmm0
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@ -1325,6 +1448,13 @@ define <8 x i16> @splatconstant_rotate_v8i16(<8 x i16> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: splatconstant_rotate_v8i16:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllw $7, %xmm0, %xmm1
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; AVX512-NEXT: vpsrlw $9, %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: splatconstant_rotate_v8i16:
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; XOP: # BB#0:
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; XOP-NEXT: vprotw $7, %xmm0, %xmm0
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@ -1363,6 +1493,15 @@ define <16 x i8> @splatconstant_rotate_v16i8(<16 x i8> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: splatconstant_rotate_v16i8:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllw $4, %xmm0, %xmm1
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; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
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; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm0
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; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
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; XOP-LABEL: splatconstant_rotate_v16i8:
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; XOP: # BB#0:
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; XOP-NEXT: vprotb $4, %xmm0, %xmm0
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@ -1408,6 +1547,15 @@ define <2 x i64> @splatconstant_rotate_mask_v2i64(<2 x i64> %a) nounwind {
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; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX-NEXT: retq
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;
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; AVX512-LABEL: splatconstant_rotate_mask_v2i64:
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; AVX512: # BB#0:
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; AVX512-NEXT: vpsllq $15, %xmm0, %xmm1
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; AVX512-NEXT: vpsrlq $49, %xmm0, %xmm0
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; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
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; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
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; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
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; AVX512-NEXT: retq
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;
|
||||
; XOP-LABEL: splatconstant_rotate_mask_v2i64:
|
||||
; XOP: # BB#0:
|
||||
; XOP-NEXT: vprotq $15, %xmm0, %xmm0
|
||||
@ -1453,6 +1601,15 @@ define <4 x i32> @splatconstant_rotate_mask_v4i32(<4 x i32> %a) nounwind {
|
||||
; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v4i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpslld $4, %xmm0, %xmm1
|
||||
; AVX512-NEXT: vpsrld $28, %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
|
||||
; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOP-LABEL: splatconstant_rotate_mask_v4i32:
|
||||
; XOP: # BB#0:
|
||||
; XOP-NEXT: vprotd $4, %xmm0, %xmm0
|
||||
@ -1498,6 +1655,15 @@ define <8 x i16> @splatconstant_rotate_mask_v8i16(<8 x i16> %a) nounwind {
|
||||
; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v8i16:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $5, %xmm0, %xmm1
|
||||
; AVX512-NEXT: vpsrlw $11, %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
|
||||
; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOP-LABEL: splatconstant_rotate_mask_v8i16:
|
||||
; XOP: # BB#0:
|
||||
; XOP-NEXT: vprotw $5, %xmm0, %xmm0
|
||||
@ -1547,6 +1713,17 @@ define <16 x i8> @splatconstant_rotate_mask_v16i8(<16 x i8> %a) nounwind {
|
||||
; AVX-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v16i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $4, %xmm0, %xmm1
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
|
||||
; AVX512-NEXT: vpsrlw $4, %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm0, %xmm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %xmm1, %xmm1
|
||||
; AVX512-NEXT: vpor %xmm0, %xmm1, %xmm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOP-LABEL: splatconstant_rotate_mask_v16i8:
|
||||
; XOP: # BB#0:
|
||||
; XOP-NEXT: vprotb $4, %xmm0, %xmm0
|
||||
|
||||
@ -1,6 +1,8 @@
|
||||
; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX1
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=AVX --check-prefix=AVX2
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512BW
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+avx512f,+avx512bw,+avx512vl | FileCheck %s --check-prefix=ALL --check-prefix=AVX512 --check-prefix=AVX512VL
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX1
|
||||
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mattr=+xop,+avx2 | FileCheck %s --check-prefix=ALL --check-prefix=XOP --check-prefix=XOPAVX2
|
||||
|
||||
@ -46,6 +48,15 @@ define <4 x i64> @var_rotate_v4i64(<4 x i64> %a, <4 x i64> %b) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: var_rotate_v4i64:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpbroadcastq {{.*}}(%rip), %ymm2
|
||||
; AVX512-NEXT: vpsubq %ymm1, %ymm2, %ymm2
|
||||
; AVX512-NEXT: vpsllvq %ymm1, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlvq %ymm2, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: var_rotate_v4i64:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
||||
@ -124,6 +135,15 @@ define <8 x i32> @var_rotate_v8i32(<8 x i32> %a, <8 x i32> %b) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: var_rotate_v8i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpbroadcastd {{.*}}(%rip), %ymm2
|
||||
; AVX512-NEXT: vpsubd %ymm1, %ymm2, %ymm2
|
||||
; AVX512-NEXT: vpsllvd %ymm1, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlvd %ymm2, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: var_rotate_v8i32:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
||||
@ -241,6 +261,26 @@ define <16 x i16> @var_rotate_v16i16(<16 x i16> %a, <16 x i16> %b) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: var_rotate_v16i16:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: # kill: %YMM1<def> %YMM1<kill> %ZMM1<def>
|
||||
; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
|
||||
; AVX512BW-NEXT: vpsubw %ymm1, %ymm2, %ymm2
|
||||
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
|
||||
; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
|
||||
; AVX512BW-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: var_rotate_v16i16:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqu {{.*#+}} ymm2 = [16,16,16,16,16,16,16,16,16,16,16,16,16,16,16,16]
|
||||
; AVX512VL-NEXT: vpsubw %ymm1, %ymm2, %ymm2
|
||||
; AVX512VL-NEXT: vpsllvw %ymm1, %ymm0, %ymm1
|
||||
; AVX512VL-NEXT: vpsrlvw %ymm2, %ymm0, %ymm0
|
||||
; AVX512VL-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: var_rotate_v16i16:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
||||
@ -359,6 +399,34 @@ define <32 x i8> @var_rotate_v32i8(<32 x i8> %a, <32 x i8> %b) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: var_rotate_v32i8:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
|
||||
; AVX512BW-NEXT: vpsubb %ymm1, %ymm2, %ymm2
|
||||
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero
|
||||
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
|
||||
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
|
||||
; AVX512BW-NEXT: vpmovwb %zmm1, %ymm1
|
||||
; AVX512BW-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero
|
||||
; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
|
||||
; AVX512BW-NEXT: vpmovwb %zmm0, %ymm0
|
||||
; AVX512BW-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: var_rotate_v32i8:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vmovdqu {{.*#+}} ymm2 = [8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8,8]
|
||||
; AVX512VL-NEXT: vpsubb %ymm1, %ymm2, %ymm2
|
||||
; AVX512VL-NEXT: vpmovzxbw {{.*#+}} zmm1 = ymm1[0],zero,ymm1[1],zero,ymm1[2],zero,ymm1[3],zero,ymm1[4],zero,ymm1[5],zero,ymm1[6],zero,ymm1[7],zero,ymm1[8],zero,ymm1[9],zero,ymm1[10],zero,ymm1[11],zero,ymm1[12],zero,ymm1[13],zero,ymm1[14],zero,ymm1[15],zero,ymm1[16],zero,ymm1[17],zero,ymm1[18],zero,ymm1[19],zero,ymm1[20],zero,ymm1[21],zero,ymm1[22],zero,ymm1[23],zero,ymm1[24],zero,ymm1[25],zero,ymm1[26],zero,ymm1[27],zero,ymm1[28],zero,ymm1[29],zero,ymm1[30],zero,ymm1[31],zero
|
||||
; AVX512VL-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
|
||||
; AVX512VL-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
|
||||
; AVX512VL-NEXT: vpmovwb %zmm1, %ymm1
|
||||
; AVX512VL-NEXT: vpmovzxbw {{.*#+}} zmm2 = ymm2[0],zero,ymm2[1],zero,ymm2[2],zero,ymm2[3],zero,ymm2[4],zero,ymm2[5],zero,ymm2[6],zero,ymm2[7],zero,ymm2[8],zero,ymm2[9],zero,ymm2[10],zero,ymm2[11],zero,ymm2[12],zero,ymm2[13],zero,ymm2[14],zero,ymm2[15],zero,ymm2[16],zero,ymm2[17],zero,ymm2[18],zero,ymm2[19],zero,ymm2[20],zero,ymm2[21],zero,ymm2[22],zero,ymm2[23],zero,ymm2[24],zero,ymm2[25],zero,ymm2[26],zero,ymm2[27],zero,ymm2[28],zero,ymm2[29],zero,ymm2[30],zero,ymm2[31],zero
|
||||
; AVX512VL-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
|
||||
; AVX512VL-NEXT: vpmovwb %zmm0, %ymm0
|
||||
; AVX512VL-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: var_rotate_v32i8:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vextractf128 $1, %ymm1, %xmm2
|
||||
@ -415,6 +483,13 @@ define <4 x i64> @constant_rotate_v4i64(<4 x i64> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: constant_rotate_v4i64:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllvq {{.*}}(%rip), %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlvq {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: constant_rotate_v4i64:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vpshlq {{.*}}(%rip), %xmm0, %xmm1
|
||||
@ -474,6 +549,13 @@ define <8 x i32> @constant_rotate_v8i32(<8 x i32> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: constant_rotate_v8i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllvd {{.*}}(%rip), %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlvd {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: constant_rotate_v8i32:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vpshld {{.*}}(%rip), %xmm0, %xmm1
|
||||
@ -542,6 +624,23 @@ define <16 x i16> @constant_rotate_v16i16(<16 x i16> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512BW-LABEL: constant_rotate_v16i16:
|
||||
; AVX512BW: # BB#0:
|
||||
; AVX512BW-NEXT: # kill: %YMM0<def> %YMM0<kill> %ZMM0<def>
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm1 = [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15]
|
||||
; AVX512BW-NEXT: vpsllvw %zmm1, %zmm0, %zmm1
|
||||
; AVX512BW-NEXT: vmovdqa {{.*#+}} ymm2 = [16,15,14,13,12,11,10,9,8,7,6,5,4,3,2,1]
|
||||
; AVX512BW-NEXT: vpsrlvw %zmm2, %zmm0, %zmm0
|
||||
; AVX512BW-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512BW-NEXT: retq
|
||||
;
|
||||
; AVX512VL-LABEL: constant_rotate_v16i16:
|
||||
; AVX512VL: # BB#0:
|
||||
; AVX512VL-NEXT: vpsllvw {{.*}}(%rip), %ymm0, %ymm1
|
||||
; AVX512VL-NEXT: vpsrlvw {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512VL-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512VL-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: constant_rotate_v16i16:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vpshlw {{.*}}(%rip), %xmm0, %xmm1
|
||||
@ -657,6 +756,16 @@ define <32 x i8> @constant_rotate_v32i8(<32 x i8> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: constant_rotate_v32i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpmovzxbw {{.*#+}} zmm0 = ymm0[0],zero,ymm0[1],zero,ymm0[2],zero,ymm0[3],zero,ymm0[4],zero,ymm0[5],zero,ymm0[6],zero,ymm0[7],zero,ymm0[8],zero,ymm0[9],zero,ymm0[10],zero,ymm0[11],zero,ymm0[12],zero,ymm0[13],zero,ymm0[14],zero,ymm0[15],zero,ymm0[16],zero,ymm0[17],zero,ymm0[18],zero,ymm0[19],zero,ymm0[20],zero,ymm0[21],zero,ymm0[22],zero,ymm0[23],zero,ymm0[24],zero,ymm0[25],zero,ymm0[26],zero,ymm0[27],zero,ymm0[28],zero,ymm0[29],zero,ymm0[30],zero,ymm0[31],zero
|
||||
; AVX512-NEXT: vpsllvw {{.*}}(%rip), %zmm0, %zmm1
|
||||
; AVX512-NEXT: vpmovwb %zmm1, %ymm1
|
||||
; AVX512-NEXT: vpsrlvw {{.*}}(%rip), %zmm0, %zmm0
|
||||
; AVX512-NEXT: vpmovwb %zmm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: constant_rotate_v32i8:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vmovdqa {{.*#+}} xmm1 = [0,1,2,3,4,5,6,7,8,7,6,5,4,3,2,1]
|
||||
@ -716,6 +825,13 @@ define <4 x i64> @splatconstant_rotate_v4i64(<4 x i64> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_v4i64:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllq $14, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlq $50, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_v4i64:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotq $14, %xmm0, %xmm1
|
||||
@ -757,6 +873,13 @@ define <8 x i32> @splatconstant_rotate_v8i32(<8 x i32> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_v8i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpslld $4, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrld $28, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_v8i32:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotd $4, %xmm0, %xmm1
|
||||
@ -798,6 +921,13 @@ define <16 x i16> @splatconstant_rotate_v16i16(<16 x i16> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_v16i16:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $7, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlw $9, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_v16i16:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotw $7, %xmm0, %xmm1
|
||||
@ -847,6 +977,15 @@ define <32 x i8> @splatconstant_rotate_v32i8(<32 x i8> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_v32i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $4, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpsrlw $4, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_v32i8:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotb $4, %xmm0, %xmm1
|
||||
@ -896,6 +1035,15 @@ define <4 x i64> @splatconstant_rotate_mask_v4i64(<4 x i64> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v4i64:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllq $15, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlq $49, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_mask_v4i64:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotq $15, %xmm0, %xmm1
|
||||
@ -945,6 +1093,15 @@ define <8 x i32> @splatconstant_rotate_mask_v8i32(<8 x i32> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v8i32:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpslld $4, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrld $28, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_mask_v8i32:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotd $4, %xmm0, %xmm1
|
||||
@ -994,6 +1151,15 @@ define <16 x i16> @splatconstant_rotate_mask_v16i16(<16 x i16> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v16i16:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $5, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpsrlw $11, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_mask_v16i16:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotw $5, %xmm0, %xmm1
|
||||
@ -1051,6 +1217,17 @@ define <32 x i8> @splatconstant_rotate_mask_v32i8(<32 x i8> %a) nounwind {
|
||||
; AVX2-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX2-NEXT: retq
|
||||
;
|
||||
; AVX512-LABEL: splatconstant_rotate_mask_v32i8:
|
||||
; AVX512: # BB#0:
|
||||
; AVX512-NEXT: vpsllw $4, %ymm0, %ymm1
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpsrlw $4, %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm0, %ymm0
|
||||
; AVX512-NEXT: vpand {{.*}}(%rip), %ymm1, %ymm1
|
||||
; AVX512-NEXT: vpor %ymm0, %ymm1, %ymm0
|
||||
; AVX512-NEXT: retq
|
||||
;
|
||||
; XOPAVX1-LABEL: splatconstant_rotate_mask_v32i8:
|
||||
; XOPAVX1: # BB#0:
|
||||
; XOPAVX1-NEXT: vprotb $4, %xmm0, %xmm1
|
||||
|
||||
Loading…
Reference in New Issue
Block a user