RPCS3/llvm-mirror
1
0
Fork 0
mirror of https://github.com/RPCS3/llvm-mirror.git synced 2024-11-24 19:52:54 +01:00
Code Issues Projects Releases Wiki Activity

Add tSpill and tRestore to the opcodes to replace with tSTRi and tLDRi

Browse Source 
respectively.

It may be a bug that these opcodes are getting this far into machine code
generation.

llvm-svn: 121931
This commit is contained in:
Bill Wendling 2010-12-16 00:49:54 +00:00
parent 448cd7f1bb
commit 6ce0807502
1 changed files with 2 additions and 0 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

2
lib/Target/ARM/Thumb1RegisterInfo.cpp
View File

@ -356,9 +356,11 @@ static void removeOperands(MachineInstr &MI, unsigned i) {
static unsigned convertToNonSPOpcode(unsigned Opcode) {
switch (Opcode) {
case ARM::tLDRspi:
case ARM::tRestore: // FIXME: Should this opcode be here?
return ARM::tLDRi;
case ARM::tSTRspi:
case ARM::tSpill: // FIXME: Should this opcode be here?
return ARM::tSTRi;
}