From 6dc95b7b2614794992167a6c7fca2637e2f94009 Mon Sep 17 00:00:00 2001 From: Chris Lattner Date: Thu, 28 Sep 2006 06:01:17 +0000 Subject: [PATCH] add a note about a general improvement to the code generator llvm-svn: 30642 --- lib/Target/README.txt | 16 +++++++++++++++- 1 file changed, 15 insertions(+), 1 deletion(-) diff --git a/lib/Target/README.txt b/lib/Target/README.txt index 48298fae878..e77573e0075 100644 --- a/lib/Target/README.txt +++ b/lib/Target/README.txt @@ -1,6 +1,20 @@ Target Independent Opportunities: -===-------------------------------------------------------------------------=== +//===---------------------------------------------------------------------===// + +We should make the following changes to clean up MachineInstr: + +1. Add an Opcode field to TargetInstrDescriptor, so you can tell the opcode of + an instruction with just a TargetInstrDescriptor*. +2. Remove the Opcode field from MachineInstr, replacing it with a + TargetInstrDescriptor*. +3. Getting information about a machine instr then becomes: + MI->getInfo()->isTwoAddress() + instead of: + const TargetInstrInfo &TII = ... + TII.isTwoAddrInstr(MI->getOpcode()) + +//===---------------------------------------------------------------------===// FreeBench/mason contains code like this: