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[InstCombine] add tests for select X, (ext X), C

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llvm-svn: 282891
This commit is contained in:
Sanjay Patel 2016-09-30 18:10:14 +00:00
parent cc1cf3d580
commit 6e0052ca56
1 changed files with 91 additions and 0 deletions
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91
test/Transforms/InstCombine/select-bitext.ll
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@ -198,3 +198,94 @@ define <2 x i32> @scalar_select_of_vectors_zext(<2 x i1> %cca, i1 %ccb) {
%r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0> %r = select i1 %ccb, <2 x i32> %ccax, <2 x i32> <i32 0, i32 0>
ret <2 x i32> %r ret <2 x i32> %r
} }
define i32 @sext_true_val_must_be_all_ones(i1 %x) {
; CHECK-LABEL: @sext_true_val_must_be_all_ones(
; CHECK-NEXT: [[EXT:%.*]] = sext i1 %x to i32
; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 [[EXT]], i32 42, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = sext i1 %x to i32
%sel = select i1 %x, i32 %ext, i32 42, !prof !0
ret i32 %sel
}
define <2 x i32> @sext_true_val_must_be_all_ones_vec(<2 x i1> %x) {
; CHECK-LABEL: @sext_true_val_must_be_all_ones_vec(
; CHECK-NEXT: [[EXT:%.*]] = sext <2 x i1> %x to <2 x i32>
; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> [[EXT]], <2 x i32> <i32 42, i32 12>, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = sext <2 x i1> %x to <2 x i32>
%sel = select <2 x i1> %x, <2 x i32> %ext, <2 x i32> <i32 42, i32 12>, !prof !0
ret <2 x i32> %sel
}
define i32 @zext_true_val_must_be_one(i1 %x) {
; CHECK-LABEL: @zext_true_val_must_be_one(
; CHECK-NEXT: [[EXT:%.*]] = zext i1 %x to i32
; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 [[EXT]], i32 42, !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = zext i1 %x to i32
%sel = select i1 %x, i32 %ext, i32 42, !prof !0
ret i32 %sel
}
define <2 x i32> @zext_true_val_must_be_one_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_true_val_must_be_one_vec(
; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> %x to <2 x i32>
; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> [[EXT]], <2 x i32> <i32 42, i32 12>, !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = zext <2 x i1> %x to <2 x i32>
%sel = select <2 x i1> %x, <2 x i32> %ext, <2 x i32> <i32 42, i32 12>, !prof !0
ret <2 x i32> %sel
}
define i32 @sext_false_val_must_be_zero(i1 %x) {
; CHECK-LABEL: @sext_false_val_must_be_zero(
; CHECK-NEXT: [[EXT:%.*]] = sext i1 %x to i32
; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 42, i32 [[EXT]], !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = sext i1 %x to i32
%sel = select i1 %x, i32 42, i32 %ext, !prof !0
ret i32 %sel
}
define <2 x i32> @sext_false_val_must_be_zero_vec(<2 x i1> %x) {
; CHECK-LABEL: @sext_false_val_must_be_zero_vec(
; CHECK-NEXT: [[EXT:%.*]] = sext <2 x i1> %x to <2 x i32>
; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> [[EXT]], !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = sext <2 x i1> %x to <2 x i32>
%sel = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> %ext, !prof !0
ret <2 x i32> %sel
}
define i32 @zext_false_val_must_be_zero(i1 %x) {
; CHECK-LABEL: @zext_false_val_must_be_zero(
; CHECK-NEXT: [[EXT:%.*]] = zext i1 %x to i32
; CHECK-NEXT: [[SEL:%.*]] = select i1 %x, i32 42, i32 [[EXT]], !prof !0
; CHECK-NEXT: ret i32 [[SEL]]
;
%ext = zext i1 %x to i32
%sel = select i1 %x, i32 42, i32 %ext, !prof !0
ret i32 %sel
}
define <2 x i32> @zext_false_val_must_be_zero_vec(<2 x i1> %x) {
; CHECK-LABEL: @zext_false_val_must_be_zero_vec(
; CHECK-NEXT: [[EXT:%.*]] = zext <2 x i1> %x to <2 x i32>
; CHECK-NEXT: [[SEL:%.*]] = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> [[EXT]], !prof !0
; CHECK-NEXT: ret <2 x i32> [[SEL]]
;
%ext = zext <2 x i1> %x to <2 x i32>
%sel = select <2 x i1> %x, <2 x i32> <i32 42, i32 12>, <2 x i32> %ext, !prof !0
ret <2 x i32> %sel
}
!0 = !{!"branch_weights", i32 3, i32 5}