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AMDGPU: Redefine setcc condition PatLeafs

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Avoid using custom code predicates.

llvm-svn: 366609
This commit is contained in:
Matt Arsenault 2019-07-19 20:24:40 +00:00
parent 2724c8cef5
commit 6e1ebba17d
3 changed files with 36 additions and 67 deletions
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78
lib/Target/AMDGPU/AMDGPUInstructions.td
View File

@ -220,80 +220,48 @@ def hi_f16_elt : PatLeaf<
// PatLeafs for floating-point comparisons
//===----------------------------------------------------------------------===//
def COND_OEQ : PatLeaf <
(cond),
[{return N->get() == ISD::SETOEQ || N->get() == ISD::SETEQ;}]
>;
def COND_ONE : PatLeaf <
(cond),
[{return N->get() == ISD::SETONE || N->get() == ISD::SETNE;}]
>;
def COND_OGT : PatLeaf <
(cond),
[{return N->get() == ISD::SETOGT || N->get() == ISD::SETGT;}]
>;
def COND_OGE : PatLeaf <
(cond),
[{return N->get() == ISD::SETOGE || N->get() == ISD::SETGE;}]
>;
def COND_OLT : PatLeaf <
(cond),
[{return N->get() == ISD::SETOLT || N->get() == ISD::SETLT;}]
>;
def COND_OLE : PatLeaf <
(cond),
[{return N->get() == ISD::SETOLE || N->get() == ISD::SETLE;}]
>;
def COND_O : PatLeaf <(cond), [{return N->get() == ISD::SETO;}]>;
def COND_UO : PatLeaf <(cond), [{return N->get() == ISD::SETUO;}]>;
def COND_OEQ : PatFrags<(ops), [(OtherVT SETOEQ), (OtherVT SETEQ)]>;
def COND_ONE : PatFrags<(ops), [(OtherVT SETONE), (OtherVT SETNE)]>;
def COND_OGT : PatFrags<(ops), [(OtherVT SETOGT), (OtherVT SETGT)]>;
def COND_OGE : PatFrags<(ops), [(OtherVT SETOGE), (OtherVT SETGE)]>;
def COND_OLT : PatFrags<(ops), [(OtherVT SETOLT), (OtherVT SETLT)]>;
def COND_OLE : PatFrags<(ops), [(OtherVT SETOLE), (OtherVT SETLE)]>;
def COND_O : PatFrags<(ops), [(OtherVT SETO)]>;
def COND_UO : PatFrags<(ops), [(OtherVT SETUO)]>;
//===----------------------------------------------------------------------===//
// PatLeafs for unsigned / unordered comparisons
//===----------------------------------------------------------------------===//
def COND_UEQ : PatLeaf <(cond), [{return N->get() == ISD::SETUEQ;}]>;
def COND_UNE : PatLeaf <(cond), [{return N->get() == ISD::SETUNE;}]>;
def COND_UGT : PatLeaf <(cond), [{return N->get() == ISD::SETUGT;}]>;
def COND_UGE : PatLeaf <(cond), [{return N->get() == ISD::SETUGE;}]>;
def COND_ULT : PatLeaf <(cond), [{return N->get() == ISD::SETULT;}]>;
def COND_ULE : PatLeaf <(cond), [{return N->get() == ISD::SETULE;}]>;
def COND_UEQ : PatFrag<(ops), (OtherVT SETUEQ)>;
def COND_UNE : PatFrag<(ops), (OtherVT SETUNE)>;
def COND_UGT : PatFrag<(ops), (OtherVT SETUGT)>;
def COND_UGE : PatFrag<(ops), (OtherVT SETUGE)>;
def COND_ULT : PatFrag<(ops), (OtherVT SETULT)>;
def COND_ULE : PatFrag<(ops), (OtherVT SETULE)>;
// XXX - For some reason R600 version is preferring to use unordered
// for setne?
def COND_UNE_NE : PatLeaf <
(cond),
[{return N->get() == ISD::SETUNE || N->get() == ISD::SETNE;}]
>;
def COND_UNE_NE : PatFrags<(ops), [(OtherVT SETUNE), (OtherVT SETNE)]>;
//===----------------------------------------------------------------------===//
// PatLeafs for signed comparisons
//===----------------------------------------------------------------------===//
def COND_SGT : PatLeaf <(cond), [{return N->get() == ISD::SETGT;}]>;
def COND_SGE : PatLeaf <(cond), [{return N->get() == ISD::SETGE;}]>;
def COND_SLT : PatLeaf <(cond), [{return N->get() == ISD::SETLT;}]>;
def COND_SLE : PatLeaf <(cond), [{return N->get() == ISD::SETLE;}]>;
def COND_SGT : PatFrag<(ops), (OtherVT SETGT)>;
def COND_SGE : PatFrag<(ops), (OtherVT SETGE)>;
def COND_SLT : PatFrag<(ops), (OtherVT SETLT)>;
def COND_SLE : PatFrag<(ops), (OtherVT SETLE)>;
//===----------------------------------------------------------------------===//
// PatLeafs for integer equality
//===----------------------------------------------------------------------===//
def COND_EQ : PatLeaf <
(cond),
[{return N->get() == ISD::SETEQ || N->get() == ISD::SETUEQ;}]
>;
def COND_NE : PatLeaf <
(cond),
[{return N->get() == ISD::SETNE || N->get() == ISD::SETUNE;}]
>;
def COND_EQ : PatFrags<(ops), [(OtherVT SETEQ), (OtherVT SETUEQ)]>;
def COND_NE : PatFrags<(ops), [(OtherVT SETNE), (OtherVT SETUNE)]>;
// FIXME: Should not need code predicate
//def COND_NULL : PatLeaf<(OtherVT null_frag)>;
def COND_NULL : PatLeaf <
(cond),
[{(void)N; return false;}]

6
lib/Target/AMDGPU/SOPInstructions.td
View File

@ -853,13 +853,13 @@ class SOPC_Base <bits<7> op, RegisterOperand rc0, RegisterOperand rc1,
let Defs = [SCC];
}
class SOPC_Helper <bits<7> op, RegisterOperand rc, ValueType vt,
string opName, PatLeaf cond> : SOPC_Base <
string opName, SDPatternOperator cond> : SOPC_Base <
op, rc, rc, opName,
[(set SCC, (si_setcc_uniform vt:$src0, vt:$src1, cond))] > {
}
class SOPC_CMP_32<bits<7> op, string opName,
PatLeaf cond = COND_NULL, string revOp = opName>
SDPatternOperator cond = COND_NULL, string revOp = opName>
: SOPC_Helper<op, SSrc_b32, i32, opName, cond>,
Commutable_REV<revOp, !eq(revOp, opName)>,
SOPKInstTable<0, opName> {
@ -868,7 +868,7 @@ class SOPC_CMP_32<bits<7> op, string opName,
}
class SOPC_CMP_64<bits<7> op, string opName,
PatLeaf cond = COND_NULL, string revOp = opName>
SDPatternOperator cond = COND_NULL, string revOp = opName>
: SOPC_Helper<op, SSrc_b64, i64, opName, cond>,
Commutable_REV<revOp, !eq(revOp, opName)> {
let isCompare = 1;

19
lib/Target/AMDGPU/VOPCInstructions.td
View File

@ -183,7 +183,7 @@ multiclass VOPCXInstAliases <string OpName, string Arch> {
}
class getVOPCPat64 <PatLeaf cond, VOPProfile P> : LetDummies {
class getVOPCPat64 <SDPatternOperator cond, VOPProfile P> : LetDummies {
list<dag> ret = !if(P.HasModifiers,
[(set i1:$sdst,
(setcc (P.Src0VT
@ -202,7 +202,7 @@ class VCMPXNoSDstTable <bit has_sdst, string Name> {
multiclass VOPC_Pseudos <string opName,
VOPC_Profile P,
PatLeaf cond = COND_NULL,
SDPatternOperator cond = COND_NULL,
string revOp = opName,
bit DefExec = 0> {
@ -236,7 +236,7 @@ multiclass VOPC_Pseudos <string opName,
let SubtargetPredicate = HasSdstCMPX in {
multiclass VOPCX_Pseudos <string opName,
VOPC_Profile P, VOPC_Profile P_NoSDst,
PatLeaf cond = COND_NULL,
SDPatternOperator cond = COND_NULL,
string revOp = opName> :
VOPC_Pseudos <opName, P, cond, revOp, 1> {
@ -285,22 +285,23 @@ def VOPC_I16_I16 : VOPC_NoSdst_Profile<[Write32Bit], i16>;
def VOPC_I32_I32 : VOPC_NoSdst_Profile<[Write32Bit], i32>;
def VOPC_I64_I64 : VOPC_NoSdst_Profile<[Write64Bit], i64>;
multiclass VOPC_F16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_F16 <string opName, SDPatternOperator cond = COND_NULL,
string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_F16_F16, cond, revOp, 0>;
multiclass VOPC_F32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_F32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_F32_F32, cond, revOp, 0>;
multiclass VOPC_F64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_F64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_F64_F64, cond, revOp, 0>;
multiclass VOPC_I16 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_I16 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_I16_I16, cond, revOp, 0>;
multiclass VOPC_I32 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_I32 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_I32_I32, cond, revOp, 0>;
multiclass VOPC_I64 <string opName, PatLeaf cond = COND_NULL, string revOp = opName> :
multiclass VOPC_I64 <string opName, SDPatternOperator cond = COND_NULL, string revOp = opName> :
VOPC_Pseudos <opName, VOPC_I1_I64_I64, cond, revOp, 0>;
multiclass VOPCX_F16 <string opName, string revOp = opName> :